Linux環境下でのPT2の消費電力を低減したい

録画サーバーをWindows環境からLinux環境に変えて数年経つわけですが、アイドル時のPT2の消費電力がWindows環境下のときより高くなる（ワットチェッカー計測）、という症状に悩まされていました。

マザーの設定が悪いのか、カーネルの起動時のオプションの設定が悪いのか、ドライバが悪いのか、PCIe-PCI変換ブリッジが悪いのか、私には原因が特定できませんでした。この症状はearth-pt1でも、pt1_drvでも起こりました。

PT2を2枚使おうとするとアイドル時の消費電力が約10WもWindows環境下よりも高くなり、PT2自体もかなり熱くなってしまうことから、PT2を2枚から1枚に減らし、妥協の運用をしていました。

ChatGPTにWindows版のドライバのソースとLinux版のドライバのソースを投げてみたら原因と対策を教えてくれました。すごい時代になったものです。

注意

私はプログラム関係は全くできません。以下の変更で問題が生じないか、判断できません。
ChatGPTにやってもらったものであり、安全は保証しません。

また、チューナーの電源を切るように変更するので、立ち上がりが若干鈍くなります。BonDriver_mirakurunを使う場合なんかは、チャンネル変更時別のチューナーに切り替わる場合があるので、チャンネル変更に時間がかかるようになることもあります。デメリットがないわけではありません。

反応の良さをとるか、省エネをとるか、ですね。アイドル時チューナー1個あたり約1.25Wの節約＝ PT2 1枚あたり約5Wの省エネになります。

earth-pt1の場合

earth-pt1の場合、元ソースに1行追加するだけでよいようです。（動作未確認）

linux/drivers/media/pci/pt1/pt1.c at master · torvalds/linux · GitHub

761行目に気になるコメントがあります。

		/* XXX: The bits should be changed depending on adap->sleep. */
		bits |= sleep_bits[i];

761

762

/* XXX: The bits should be changed depending on adap->sleep. */

bits |= sleep_bits[i];

本来は adap->sleep の状態に応じてビットを変更する必要がある、とのことなのでそのようにすればいいようです。

                /* XXX: The bits should be changed depending on adap->sleep. */
                if (!adap->sleep)
                	bits |= sleep_bits[i];

761

762

763

/* XXX: The bits should be changed depending on adap->sleep. */

if (!adap->sleep)

bits |= sleep_bits[i];

earth-pt1を使ってて省電力にしたい場合は自己責任でお試しください。

pt1_drvの場合

GitHub – stz2012/recpt1: PT1/PT2/PT3をLinuxで使う為の録画ツール（STZ版） · GitHub

BIT_33A1 / BIT_33A2 / BIT_5A_ / BIT_5A1 / BIT_5A2

これらのビットがドライバロード後から常時立つようになっていますが、チューナーの状態に合わせて ON / OFF するようになればいいようです。

大幅な改修となるので、該当のソースはそのまま貼っておきます。ついでに、LNB電源は1枚目のPT2のみ供給するように変更しました。2枚目のPT2のSチューナーのみが起動する場合も、1枚目のPT2からLNB電源が供給するように変更してます。1枚目のPT2にのみ導通すればいいので、分配器の選択肢が広がるかも。

PT2の2枚環境で一応3週間不具合が起きていませんが、PT1/PT2混在環境でも問題ないかはわかりません。

繰り返しますがChatGPTに書いてもらっただけで私は理解していません。最適化はされてないでしょうし、導入する場合は自己責任で。

pt1_tuner.c と pt1_pci.c に変更を加えます。

/* pt1-tuner.c: A PT1 on Tuner driver for Linux. */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/version.h>

#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)
#include <asm/system.h>
#endif
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>

#include	"pt1_com.h"
#include	"pt1_pci.h"
#include	"pt1_i2c.h"
#include	"pt1_tuner.h"
#include	"pt1_tuner_data.h"

typedef	struct	_TUNER_INFO{
	int		isdb_s ;
	int		isdb_t ;
}TUNER_INFO;

TUNER_INFO	tuner_info[2] = {
	{T0_ISDB_S, T0_ISDB_T},
	{T1_ISDB_S, T1_ISDB_T}
};

#define PT2_MAX_CARDS          8
#define PT2_TUNER_UNIT_COUNT   2
#define PT2_ISDB_S_INDEX       0
#define PT2_ISDB_T_INDEX       1

/*
 * PT2 per-card power state.
 *
 * Windows XC3S_PowerReset::Sleep() equivalent:
 *
 *   tuner 0, ISDB-S -> BIT_33A1
 *   tuner 0, ISDB-T -> BIT_5A1 + BIT_5A_
 *   tuner 1, ISDB-S -> BIT_33A2
 *   tuner 1, ISDB-T -> BIT_5A2 + BIT_5A_
 *
 * This state is keyed by regs, so multiple PT2 cards keep independent state.
 */
#define PT2_TUNER_UNIT_COUNT	2
#define PT2_ISDB_S_INDEX	0
#define PT2_ISDB_T_INDEX	1

struct pt2_power_state {
	void __iomem* regs;
	int used;

	__u32 lnb;
	__u32 tuner_power;

	int tuner_sleep[PT2_TUNER_UNIT_COUNT][2];
};

static DEFINE_MUTEX(pt2_power_lock);
static struct pt2_power_state pt2_power_states[PT2_MAX_CARDS];

static void pt2_power_state_init(struct pt2_power_state* st, void __iomem* regs)
{
	st->regs = regs;
	st->used = 1;

	st->lnb = LNB_OFF;
	st->tuner_power = TUNER_POWER_OFF;

	/*
	 * Initial state: all individual tuner rails are OFF.
	 */
	st->tuner_sleep[0][PT2_ISDB_S_INDEX] = 1;
	st->tuner_sleep[0][PT2_ISDB_T_INDEX] = 1;
	st->tuner_sleep[1][PT2_ISDB_S_INDEX] = 1;
	st->tuner_sleep[1][PT2_ISDB_T_INDEX] = 1;
}

static struct pt2_power_state* pt2_get_power_state_locked(void __iomem* regs)
{
	int i;
	int free_index = -1;

	for (i = 0; i < PT2_MAX_CARDS; i++) {
		if (pt2_power_states[i].used && pt2_power_states[i].regs == regs)
			return &pt2_power_states[i];

		if (!pt2_power_states[i].used && free_index < 0)
			free_index = i;
	}

	if (free_index >= 0) {
		pt2_power_state_init(&pt2_power_states[free_index], regs);
		return &pt2_power_states[free_index];
	}

	printk(KERN_ERR "PT2: no free power state slot\n");
	return NULL;
}

static __u32 pt2_make_power_data(struct pt2_power_state* st)
{
	__u32 val = 0;

	/*
	 * LNB control.
	 *
	 * LNB_OFF : BIT_LNB_UP=0, BIT_LNB_DOWN=0
	 * LNB_11V : BIT_LNB_UP=0, BIT_LNB_DOWN=1
	 * LNB_15V : BIT_LNB_UP=1, BIT_LNB_DOWN=1
	 */
	switch (st->lnb) {
	case LNB_11V:
		val |= (1 << BIT_LNB_DOWN);
		break;
	case LNB_15V:
		val |= (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN);
		break;
	case LNB_OFF:
	default:
		break;
	}

	/*
	 * Whole tuner power / reset.
	 */
	switch (st->tuner_power) {
	case TUNER_POWER_ON_RESET_ENABLE:
		val |= (1 << BIT_TUNER);
		break;
	case TUNER_POWER_ON_RESET_DISABLE:
		val |= (1 << BIT_TUNER) | (1 << BIT_RESET);
		break;
	case TUNER_POWER_OFF:
	default:
		break;
	}

	/*
	 * Individual PT2 tuner power bits.
	 *
	 * sleep == 1: corresponding power bit is OFF
	 * sleep == 0: corresponding power bit is ON
	 */
	if (!st->tuner_sleep[0][PT2_ISDB_S_INDEX])
		val |= (1 << BIT_33A1);

	if (!st->tuner_sleep[1][PT2_ISDB_S_INDEX])
		val |= (1 << BIT_33A2);

	if (!st->tuner_sleep[0][PT2_ISDB_T_INDEX])
		val |= (1 << BIT_5A1) | (1 << BIT_5A_);

	if (!st->tuner_sleep[1][PT2_ISDB_T_INDEX])
		val |= (1 << BIT_5A2) | (1 << BIT_5A_);

	return val;
}

static void pt2_write_power_data_locked(struct pt2_power_state* st)
{
	__u32 val;

	val = pt2_make_power_data(st);

	printk(KERN_INFO
		"PT2:power regs=%p lnb=%u tuner_power=%u sleep[S0=%d T0=%d S1=%d T1=%d] val=0x%08x\n",
		st->regs,
		st->lnb,
		st->tuner_power,
		st->tuner_sleep[0][PT2_ISDB_S_INDEX],
		st->tuner_sleep[0][PT2_ISDB_T_INDEX],
		st->tuner_sleep[1][PT2_ISDB_S_INDEX],
		st->tuner_sleep[1][PT2_ISDB_T_INDEX],
		val);

	writel(val, st->regs + CFG_REGS_ADDR);
}

static int pt2_address_to_tuner_isdb(int address, int tuner_type,
	int* tuner_no, int* isdb)
{
	int i;

	for (i = 0; i < PT2_TUNER_UNIT_COUNT; i++) {
		if (tuner_type == CHANNEL_TYPE_ISDB_S &&
			address == tuner_info[i].isdb_s) {
			*tuner_no = i;
			*isdb = PT2_ISDB_S_INDEX;
			return 0;
		}

		if (tuner_type == CHANNEL_TYPE_ISDB_T &&
			address == tuner_info[i].isdb_t) {
			*tuner_no = i;
			*isdb = PT2_ISDB_T_INDEX;
			return 0;
		}
	}

	return -EINVAL;
}

static void pt2_set_tuner_sleep(void __iomem* regs,
	int tuner_no, int isdb, int sleep)
{
	struct pt2_power_state* st;

	mutex_lock(&pt2_power_lock);

	st = pt2_get_power_state_locked(regs);
	if (st) {
		st->tuner_sleep[tuner_no][isdb] = sleep ? 1 : 0;
		pt2_write_power_data_locked(st);
	}

	mutex_unlock(&pt2_power_lock);
}

typedef	struct	_isdb_t_freq_add_table{
	__u16		pos ;		// 追加するチャンネルポジション
	__u16		add_freq ;	// 追加する値
}isdb_t_freq_add_table;

isdb_t_freq_add_table	isdb_t_freq_add[10] = {
	{  7, 0x8081},				// 0～7迄
	{ 12, 0x80A1},				// 8～12迄
	{ 21, 0x8062},				// 13～21迄
	{ 39, 0x80A2},				// 22～39迄
	{ 51, 0x80E2},				// 40～51迄
	{ 59, 0x8064},				// 52～59迄
	{ 75, 0x8084},				// 60～75迄
	{ 84, 0x80a4},				// 76～84迄
	{100, 0x80C4},				// 85～100迄
	{112, 0x80E4}				// 101～112迄
};

void settuner_reset(void __iomem* regs, int cardtype, __u32 lnb, __u32 tuner)
{
	__u32 val = TUNER_POWER_OFF;

	if (cardtype == PT2) {
		struct pt2_power_state* st;

		mutex_lock(&pt2_power_lock);

		st = pt2_get_power_state_locked(regs);
		if (st) {
			st->lnb = lnb;
			st->tuner_power = tuner;

			/*
			 * Whole tuner power OFF means all individual tuner rails OFF.
			 */
			if (tuner == TUNER_POWER_OFF) {
				st->tuner_sleep[0][PT2_ISDB_S_INDEX] = 1;
				st->tuner_sleep[0][PT2_ISDB_T_INDEX] = 1;
				st->tuner_sleep[1][PT2_ISDB_S_INDEX] = 1;
				st->tuner_sleep[1][PT2_ISDB_T_INDEX] = 1;
			}

			pt2_write_power_data_locked(st);
		}

		mutex_unlock(&pt2_power_lock);
		return;
	}

	switch (lnb) {
	case LNB_11V:
		val = (1 << BIT_LNB_DOWN);
		break;
	case LNB_15V:
		val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN);
		break;
	}

	if (cardtype == PT1) {
		switch (tuner) {
		case TUNER_POWER_ON_RESET_ENABLE:
			val |= (1 << BIT_TUNER);
			break;
		case TUNER_POWER_ON_RESET_DISABLE:
			val |= (1 << BIT_TUNER) | (1 << BIT_RESET);
			break;
		}
	}

	writel(val, (regs + CFG_REGS_ADDR));
}

static	int		init_isdb_s(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr)
{

	WBLOCK	wk;
	int		lp ;
	__u32	val ;

	// ISDB-S/T初期化
	memcpy(&wk, &com_initdata, sizeof(WBLOCK));

	// 初期化１(なぜかREADなので)
	memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK));
	wk.addr = addr;
	val = i2c_read(regs, lock, &wk, 1);

	if(cardtype == PT1) {
		if((val & 0xff) != 0x4c) {
			printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val);
			return -EIO ;
		}
		for(lp = 0 ; lp < PT1_MAX_ISDB_S_INIT ; lp++) {
			memcpy(&wk, isdb_s_initial_pt1[lp], sizeof(WBLOCK));
			wk.addr = addr;
			i2c_write(regs, lock, &wk);
		}
	}
	else if(cardtype == PT2) {
		if((val & 0xff) != 0x52) {
			printk(KERN_INFO "PT2:ISDB-S Read(%x)\n", val);
			return -EIO ;
		}
		for(lp = 0 ; lp < PT2_MAX_ISDB_S_INIT ; lp++) {
			memcpy(&wk, isdb_s_initial_pt2[lp], sizeof(WBLOCK));
			wk.addr = addr;
			i2c_write(regs, lock, &wk);
		}
	}

	return 0 ;
}
static	void	init_isdb_t(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr)
{
	int		lp ;
	WBLOCK	wk;

	// ISDB-S/T初期化
	if(cardtype == PT1) {
		for(lp = 0 ; lp < PT1_MAX_ISDB_T_INIT ; lp++){
			memcpy(&wk, isdb_t_initial_pt1[lp], sizeof(WBLOCK));
			wk.addr = addr;
			i2c_write(regs, lock, &wk);
		}
	}
	else if(cardtype == PT2) {
		for(lp = 0 ; lp < PT2_MAX_ISDB_T_INIT ; lp++){
			memcpy(&wk, isdb_t_initial_pt2[lp], sizeof(WBLOCK));
			wk.addr = addr;
			i2c_write(regs, lock, &wk);
		}
	}
}

int		tuner_init(void __iomem *regs, int cardtype, struct mutex *lock, int tuner_no)
{

	int		rc ;
	WBLOCK	wk;

	// ISDB-S/T初期化
	memcpy(&wk, &com_initdata, sizeof(WBLOCK));

	// 初期化(共通)
	wk.addr = tuner_info[tuner_no].isdb_t ;
	i2c_write(regs, lock, &wk);
	wk.addr = tuner_info[tuner_no].isdb_s ;
	i2c_write(regs, lock, &wk);

	rc = init_isdb_s(regs, cardtype, lock, tuner_info[tuner_no].isdb_s);
	if(rc < 0){
		return rc ;
	}
	init_isdb_t(regs, cardtype, lock, tuner_info[tuner_no].isdb_t);

	memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK));
	wk.addr = tuner_info[tuner_no].isdb_s ;
	i2c_write(regs, lock, &wk);

	memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK));
	wk.addr = tuner_info[tuner_no].isdb_t ;
	i2c_write(regs, lock, &wk);

	return 0 ;
}
void set_sleepmode(void __iomem* regs, struct mutex* lock, int address, int tuner_type, int type)
{
	WBLOCK wk;
	int tuner_no = -1;
	int isdb = -1;
	int is_pt2_tuner = 0;

	if (pt2_address_to_tuner_isdb(address, tuner_type, &tuner_no, &isdb) == 0)
		is_pt2_tuner = 1;

	if (type == TYPE_WAKEUP) {
		switch (tuner_type) {
		case CHANNEL_TYPE_ISDB_S:
			printk(KERN_INFO "PT1:ISDB-S Wakeup addr=0x%02x\n", address);

			/*
			 * PT2: turn ON only the required individual tuner rail
			 * before sending I2C wakeup commands.
			 */
			if (is_pt2_tuner) {
				pt2_set_tuner_sleep(regs, tuner_no, isdb, 0);
				schedule_timeout_interruptible(msecs_to_jiffies(1000));
			}

			memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK));
			wk.addr = address;
			i2c_write(regs, lock, &wk);

			memcpy(&wk, &isdb_s_wake2, sizeof(WBLOCK));
			wk.addr = address;
			i2c_write(regs, lock, &wk);
			break;

		case CHANNEL_TYPE_ISDB_T:
			printk(KERN_INFO "PT1:ISDB-T Wakeup addr=0x%02x\n", address);

			/*
			 * PT2: turn ON only the required individual tuner rail
			 * before sending I2C wakeup commands.
			 */
			if (is_pt2_tuner) {
				pt2_set_tuner_sleep(regs, tuner_no, isdb, 0);
				schedule_timeout_interruptible(msecs_to_jiffies(1000));
			}

			memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK));
			wk.addr = address;
			i2c_write(regs, lock, &wk);

			memcpy(&wk, &isdb_t_wake2, sizeof(WBLOCK));
			wk.addr = address;
			i2c_write(regs, lock, &wk);
			break;
		}
	}

	if (type == TYPE_SLEEP) {
		switch (tuner_type) {
		case CHANNEL_TYPE_ISDB_S:
			printk(KERN_INFO "PT1:ISDB-S Sleep addr=0x%02x\n", address);

			memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK));
			wk.addr = address;
			i2c_write(regs, lock, &wk);

			/*
			 * PT2: after TC90512 sleep command, turn OFF the
			 * corresponding individual tuner rail.
			 */
			if (is_pt2_tuner)
				pt2_set_tuner_sleep(regs, tuner_no, isdb, 1);

			break;

		case CHANNEL_TYPE_ISDB_T:
			printk(KERN_INFO "PT1:ISDB-T Sleep addr=0x%02x\n", address);

			memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK));
			wk.addr = address;
			i2c_write(regs, lock, &wk);

			/*
			 * PT2: after TC90512 sleep command, turn OFF the
			 * corresponding individual tuner rail.
			 */
			if (is_pt2_tuner)
				pt2_set_tuner_sleep(regs, tuner_no, isdb, 1);

			break;
		}
	}
}

int		bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel)
{
	int		lp ;
	int		tmcclock = FALSE ;
	WBLOCK	wk;
	__u32	val ;

	if(channel >= MAX_BS_CHANNEL){
		return -EIO ;
	}
	// ISDB-S PLLロック
	for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){
		memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK));
		wk.addr = addr ;
		i2c_write(regs, lock, &wk);
	}

	// PLLロック確認
	// チェック用
	for(lp = 0 ; lp < 200 ; lp++){
		memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK));
		wk.addr = addr;
		val = i2c_read(regs, lock, &wk, 1);
		if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){
			tmcclock = TRUE ;
			break ;
		}
	}

	if(tmcclock == FALSE){
		printk(KERN_INFO "PLL LOCK ERROR\n");
		return -EIO;
	}

	memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK));
	wk.addr = addr;
	i2c_write(regs, lock, &wk);

	tmcclock = FALSE ;

	for(lp = 0 ; lp < 200 ; lp++){
		memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK));
		wk.addr = addr;

		val = i2c_read(regs, lock, &wk, 1);
		if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){
			tmcclock = TRUE ;
			break ;
		}
	}

	if(tmcclock == FALSE){
		printk(KERN_INFO "TMCC LOCK ERROR\n");
		return -EIO;
	}

	return 0 ;
}
int		ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id)
{

	int		lp ;
	WBLOCK	wk;
	__u32	val ;
	union{
		__u8	ts[2];
		__u16	tsid;
	}uts_id ;

	uts_id.tsid = ts_id ;
	memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK));
	wk.addr = addr;
	// TS-ID設定
	wk.value[1]  = uts_id.ts[1];
	wk.value[2]  = uts_id.ts[0];
	i2c_write(regs, lock, &wk);

	for(lp = 0 ; lp < 100 ; lp++){
		memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK));
		wk.addr = addr;
		val = i2c_read(regs, lock, &wk, 2);
		if((val & 0xFFFF) == ts_id){
			return 0 ;
		}
	}
	printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id);
	return -EIO ;
}
int		bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc)
{

	int		lp ;
	int		lp2;
	WBLOCK	wk;
	__u32	val ;
	ISDB_S_TS_ID	*tsid ;
	union{
		__u8	slot[4];
		__u32	u32slot;
	}ts_slot ;
	union{
		__u16	ts[2];
		__u32	tsid;
	}ts_id ;

	if(channel >= MAX_BS_CHANNEL){
		printk(KERN_INFO "Invalid Channel(%d)\n", channel);
		return -EIO ;
	}
	val = bs_frequency(regs, lock, addr, channel);
	if(val == -EIO){
		return val ;
	}

	tsid = &tmcc->ts_id[0] ;
	// 該当周波数のTS-IDを取得
	for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){
		for(lp2 = 0 ; lp2 < 100 ; lp2++){
			memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK));
			wk.addr = addr;
			ts_id.tsid = i2c_read(regs, lock, &wk, 4);
			// TS-IDが0の場合は再取得する
			if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){
				break ;
			}
		}
		tsid->ts_id = ts_id.ts[1] ;
		tsid += 1;
		tsid->ts_id = ts_id.ts[0] ;
		tsid += 1;
	}

	memcpy(&wk, &bs_get_agc, sizeof(WBLOCK));
	wk.addr = addr;
	tmcc->agc = i2c_read(regs, lock, &wk, 1);

	// TS-ID別の情報を取得
	tsid = &tmcc->ts_id[0] ;
	for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){
		// TS-IDなし=0XFFFF
		if(tsid->ts_id == 0xFFFF){
			continue ;
		}
		ts_lock(regs, lock, addr, tsid->ts_id);

		//スロット取得
		memcpy(&wk, &bs_get_slot, sizeof(WBLOCK));
		wk.addr = addr;
		ts_slot.u32slot = i2c_read(regs, lock, &wk, 3);
		tsid->high_mode = 0;
		tsid->low_slot  = ts_slot.slot[0] ;
		tsid->high_slot = ts_slot.slot[1] ;
		tsid->low_mode  = ts_slot.slot[2] ;
	}

	memcpy(&wk, &bs_get_clock, sizeof(WBLOCK));
	wk.addr = addr;
	tmcc->clockmargin = i2c_read(regs, lock, &wk, 1);

	memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK));
	wk.addr = addr;
	tmcc->carriermargin = i2c_read(regs, lock, &wk, 1);
	return 0 ;
}
int		isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr)
{
	WBLOCK	wk;
	__u32	val ;
	__u32	val2;
	int		val3 ;

	memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK));
	wk.addr = addr;
	val = i2c_read(regs, lock, &wk, 1);

	memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK));
	wk.addr = addr;
	val2 = i2c_read(regs, lock, &wk, 1);
	val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF));

	return val3 ;
}

__u32	getfrequency_add(__u32 channel)
{
	int		lp ;

	for(lp = 0 ; lp < 10 ; lp++){
		if(channel <= isdb_t_freq_add[lp].pos){
			return isdb_t_freq_add[lp].add_freq ;
		}
	}
	return 0 ;
}
__u32	getfrequency(__u32 channel, int addfreq)
{
	__u32	frequencyoffset = 0;
	__u32	frequencyOffset = 0;

	if (12 <= channel)
		frequencyoffset += 2;
	if (17 <= channel)
		frequencyoffset -= 2;
	if (63 <= channel){
		frequencyoffset += 2;
	}
#if 0
	return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400;
#endif
	frequencyOffset = 93 + channel * 6 + frequencyoffset;
	frequencyOffset = 7 * (frequencyOffset + addfreq);
	return frequencyOffset + 400;

}
int		isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq)
{

	int		lp ;
	WBLOCK	wk;
	__u32	val ;
	int		tmcclock = FALSE ;
	union{
		__u8	charfreq[2];
		__u16	freq;
	}freq[2] ;

	if(channel >= MAX_ISDB_T_CHANNEL){
		return -EIO ;
	}

	freq[0].freq = getfrequency(channel, addfreq);
	freq[1].freq = getfrequency_add(channel);
	//指定周波数
	memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK));
	wk.addr = addr ;
	// 計算した周波数を設定
	wk.value[wk.count] = freq[0].charfreq[1];
	wk.count += 1 ;
	wk.value[wk.count] = freq[0].charfreq[0];
	wk.count += 1 ;

	// 計算した周波数付加情報を設定
	wk.value[wk.count] = freq[1].charfreq[1];
	wk.count += 1 ;
	wk.value[wk.count] = freq[1].charfreq[0];
	wk.count += 1 ;

	i2c_write(regs, lock, &wk);

	for(lp = 0 ; lp < 100 ; lp++){
		memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK));
		wk.addr = addr;
		val = i2c_read(regs, lock, &wk, 1);
		if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){
			tmcclock = TRUE ;
			break ;
		}
	}
	if(tmcclock != TRUE){
		printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val);
		return -EIO ;
	}

	memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK));
	wk.addr = addr ;
	i2c_write(regs, lock, &wk);

	tmcclock = FALSE ;
	for(lp = 0 ; lp < 1000 ; lp++){
		memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK));
		wk.addr = addr;
		val = i2c_read(regs, lock, &wk, 1);
		if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){
			tmcclock = TRUE ;
			break ;
		}
	}
	if(tmcclock != TRUE){
		return -EIO ;
	}
	return 0 ;
}
int		isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr)
{
	__u32	val ;
	__u32	val2;
	__u32	val3;
	WBLOCK	wk;

	memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK));
	wk.addr = addr;
	val = i2c_read(regs, lock, &wk, 1);
	printk(KERN_INFO "CN(1)Val(%x)\n", val);

	memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK));
	wk.addr = addr;
	val2 = i2c_read(regs, lock, &wk, 1);
	val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF));
	return val3 ;
}
#if 0
int		isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc)
{

	int		lp ;
	int		rc ;
	int		lp2 ;
	WBLOCK	wk;
	__u32	val ;

	printk(KERN_INFO "Channel(%d) Start\n", channel);
	if(channel >= MAX_ISDB_T_CHANNEL){
		return -EIO ;
	}
	rc = isdb_t_frequency(regs, lock, addr, channel);
	if(rc < 0){
		return -EIO ;
	}
	for(lp = 0 ; lp < 100 ; lp++){
		memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK));
		wk.addr = addr;
		val = i2c_read(regs, lock, &wk, 4);
		if((val & 0xFF) != 0){
			break ;
		}
	}
	printk(KERN_INFO "TMCC(1)Val(%x)\n", val);

	for(lp = 0 ; lp < 100 ; lp++){
		memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK));
		wk.addr = addr;
		val = i2c_read(regs, lock, &wk, 4);
		if((val & 0xFF) != 0){
			break ;
		}
	}
	printk(KERN_INFO "TMCC(2)Val(%x)\n", val);

	memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK));
	wk.addr = addr;
	val = i2c_read(regs, lock, &wk, 1);
	printk(KERN_INFO "CN(1)Val(%x)\n", val);

	memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK));
	wk.addr = addr;
	val = i2c_read(regs, lock, &wk, 1);
	printk(KERN_INFO "CN(2)Val(%x)\n", val);

	memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK));
	wk.addr = addr;
	val = i2c_read(regs, lock, &wk, 1);
	printk(KERN_INFO "AGC(1)Val(%x)\n", val);

	memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK));
	wk.addr = addr;
	val = i2c_read(regs, lock, &wk, 1);
	printk(KERN_INFO "AGC(2)Val(%x)\n", val);
	return 0;
}
#endif

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/* pt1-tuner.c: A PT1 on Tuner driver for Linux. */

#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/errno.h>

#include <linux/pci.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/mutex.h>

#include <linux/version.h>

#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)

#include <asm/system.h>

#endif

#include <asm/io.h>

#include <asm/irq.h>

#include <asm/uaccess.h>

#include "pt1_com.h"

#include "pt1_pci.h"

#include "pt1_i2c.h"

#include "pt1_tuner.h"

#include "pt1_tuner_data.h"

typedef struct _TUNER_INFO{

int isdb_s ;

int isdb_t ;

}TUNER_INFO;

TUNER_INFO tuner_info[2] = {

{T0_ISDB_S, T0_ISDB_T},

{T1_ISDB_S, T1_ISDB_T}

};

#define PT2_MAX_CARDS 8

#define PT2_TUNER_UNIT_COUNT 2

#define PT2_ISDB_S_INDEX 0

#define PT2_ISDB_T_INDEX 1

* PT2 per-card power state.

* Windows XC3S_PowerReset::Sleep() equivalent:

* tuner 0, ISDB-S -> BIT_33A1

* tuner 0, ISDB-T -> BIT_5A1 + BIT_5A_

* tuner 1, ISDB-S -> BIT_33A2

* tuner 1, ISDB-T -> BIT_5A2 + BIT_5A_

* This state is keyed by regs, so multiple PT2 cards keep independent state.

#define PT2_TUNER_UNIT_COUNT 2

#define PT2_ISDB_S_INDEX 0

#define PT2_ISDB_T_INDEX 1

struct pt2_power_state {

void __iomem* regs;

int used;

__u32 lnb;

__u32 tuner_power;

int tuner_sleep[PT2_TUNER_UNIT_COUNT][2];

};

static DEFINE_MUTEX(pt2_power_lock);

static struct pt2_power_state pt2_power_states[PT2_MAX_CARDS];

static void pt2_power_state_init(struct pt2_power_state* st, void __iomem* regs)

{

st->regs = regs;

st->used = 1;

st->lnb = LNB_OFF;

st->tuner_power = TUNER_POWER_OFF;

* Initial state: all individual tuner rails are OFF.

st->tuner_sleep[0][PT2_ISDB_S_INDEX] = 1;

st->tuner_sleep[0][PT2_ISDB_T_INDEX] = 1;

st->tuner_sleep[1][PT2_ISDB_S_INDEX] = 1;

st->tuner_sleep[1][PT2_ISDB_T_INDEX] = 1;

}

static struct pt2_power_state* pt2_get_power_state_locked(void __iomem* regs)

{

int i;

int free_index = -1;

for (i = 0; i < PT2_MAX_CARDS; i++) {

if (pt2_power_states[i].used && pt2_power_states[i].regs == regs)

return &pt2_power_states[i];

if (!pt2_power_states[i].used && free_index < 0)

free_index = i;

}

if (free_index >= 0) {

pt2_power_state_init(&pt2_power_states[free_index], regs);

return &pt2_power_states[free_index];

}

printk(KERN_ERR "PT2: no free power state slot\n");

return NULL;

}

static __u32 pt2_make_power_data(struct pt2_power_state* st)

{

__u32 val = 0;

* LNB control.

* LNB_OFF : BIT_LNB_UP=0, BIT_LNB_DOWN=0

* LNB_11V : BIT_LNB_UP=0, BIT_LNB_DOWN=1

* LNB_15V : BIT_LNB_UP=1, BIT_LNB_DOWN=1

switch (st->lnb) {

case LNB_11V:

val |= (1 << BIT_LNB_DOWN);

break;

case LNB_15V:

val |= (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN);

break;

case LNB_OFF:

default:

break;

}

* Whole tuner power / reset.

switch (st->tuner_power) {

case TUNER_POWER_ON_RESET_ENABLE:

val |= (1 << BIT_TUNER);

break;

case TUNER_POWER_ON_RESET_DISABLE:

val |= (1 << BIT_TUNER) | (1 << BIT_RESET);

break;

case TUNER_POWER_OFF:

default:

break;

}

* Individual PT2 tuner power bits.

* sleep == 1: corresponding power bit is OFF

* sleep == 0: corresponding power bit is ON

if (!st->tuner_sleep[0][PT2_ISDB_S_INDEX])

val |= (1 << BIT_33A1);

if (!st->tuner_sleep[1][PT2_ISDB_S_INDEX])

val |= (1 << BIT_33A2);

if (!st->tuner_sleep[0][PT2_ISDB_T_INDEX])

val |= (1 << BIT_5A1) | (1 << BIT_5A_);

if (!st->tuner_sleep[1][PT2_ISDB_T_INDEX])

val |= (1 << BIT_5A2) | (1 << BIT_5A_);

return val;

}

static void pt2_write_power_data_locked(struct pt2_power_state* st)

{

__u32 val;

val = pt2_make_power_data(st);

printk(KERN_INFO

"PT2:power regs=%p lnb=%u tuner_power=%u sleep[S0=%d T0=%d S1=%d T1=%d] val=0x%08x\n",

st->regs,

st->lnb,

st->tuner_power,

st->tuner_sleep[0][PT2_ISDB_S_INDEX],

st->tuner_sleep[0][PT2_ISDB_T_INDEX],

st->tuner_sleep[1][PT2_ISDB_S_INDEX],

st->tuner_sleep[1][PT2_ISDB_T_INDEX],

val);

writel(val, st->regs + CFG_REGS_ADDR);

}

static int pt2_address_to_tuner_isdb(int address, int tuner_type,

int* tuner_no, int* isdb)

{

int i;

for (i = 0; i < PT2_TUNER_UNIT_COUNT; i++) {

if (tuner_type == CHANNEL_TYPE_ISDB_S &&

address == tuner_info[i].isdb_s) {

*tuner_no = i;

*isdb = PT2_ISDB_S_INDEX;

return 0;

}

if (tuner_type == CHANNEL_TYPE_ISDB_T &&

address == tuner_info[i].isdb_t) {

*tuner_no = i;

*isdb = PT2_ISDB_T_INDEX;

return 0;

}

return -EINVAL;

}

static void pt2_set_tuner_sleep(void __iomem* regs,

int tuner_no, int isdb, int sleep)

{

struct pt2_power_state* st;

mutex_lock(&pt2_power_lock);

st = pt2_get_power_state_locked(regs);

if (st) {

st->tuner_sleep[tuner_no][isdb] = sleep ? 1 : 0;

pt2_write_power_data_locked(st);

}

mutex_unlock(&pt2_power_lock);

}

typedef struct _isdb_t_freq_add_table{

__u16 pos ; // 追加するチャンネルポジション

__u16 add_freq ; // 追加する値

}isdb_t_freq_add_table;

isdb_t_freq_add_table isdb_t_freq_add[10] = {

{ 7, 0x8081}, // 0～7迄

{ 12, 0x80A1}, // 8～12迄

{ 21, 0x8062}, // 13～21迄

{ 39, 0x80A2}, // 22～39迄

{ 51, 0x80E2}, // 40～51迄

{ 59, 0x8064}, // 52～59迄

{ 75, 0x8084}, // 60～75迄

{ 84, 0x80a4}, // 76～84迄

{100, 0x80C4}, // 85～100迄

{112, 0x80E4} // 101～112迄

};

void settuner_reset(void __iomem* regs, int cardtype, __u32 lnb, __u32 tuner)

{

__u32 val = TUNER_POWER_OFF;

if (cardtype == PT2) {

struct pt2_power_state* st;

mutex_lock(&pt2_power_lock);

st = pt2_get_power_state_locked(regs);

if (st) {

st->lnb = lnb;

st->tuner_power = tuner;

* Whole tuner power OFF means all individual tuner rails OFF.

if (tuner == TUNER_POWER_OFF) {

st->tuner_sleep[0][PT2_ISDB_S_INDEX] = 1;

st->tuner_sleep[0][PT2_ISDB_T_INDEX] = 1;

st->tuner_sleep[1][PT2_ISDB_S_INDEX] = 1;

st->tuner_sleep[1][PT2_ISDB_T_INDEX] = 1;

}

pt2_write_power_data_locked(st);

}

mutex_unlock(&pt2_power_lock);

return;

}

switch (lnb) {

case LNB_11V:

val = (1 << BIT_LNB_DOWN);

break;

case LNB_15V:

val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN);

break;

}

if (cardtype == PT1) {

switch (tuner) {

case TUNER_POWER_ON_RESET_ENABLE:

val |= (1 << BIT_TUNER);

break;

case TUNER_POWER_ON_RESET_DISABLE:

val |= (1 << BIT_TUNER) | (1 << BIT_RESET);

break;

}

writel(val, (regs + CFG_REGS_ADDR));

}

static int init_isdb_s(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr)

{

WBLOCK wk;

int lp ;

__u32 val ;

// ISDB-S/T初期化

memcpy(&wk, &com_initdata, sizeof(WBLOCK));

// 初期化１(なぜかREADなので)

memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

if(cardtype == PT1) {

if((val & 0xff) != 0x4c) {

printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val);

return -EIO ;

}

for(lp = 0 ; lp < PT1_MAX_ISDB_S_INIT ; lp++) {

memcpy(&wk, isdb_s_initial_pt1[lp], sizeof(WBLOCK));

wk.addr = addr;

i2c_write(regs, lock, &wk);

}

else if(cardtype == PT2) {

if((val & 0xff) != 0x52) {

printk(KERN_INFO "PT2:ISDB-S Read(%x)\n", val);

return -EIO ;

}

for(lp = 0 ; lp < PT2_MAX_ISDB_S_INIT ; lp++) {

memcpy(&wk, isdb_s_initial_pt2[lp], sizeof(WBLOCK));

wk.addr = addr;

i2c_write(regs, lock, &wk);

}

return 0 ;

}

static void init_isdb_t(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr)

{

int lp ;

WBLOCK wk;

// ISDB-S/T初期化

if(cardtype == PT1) {

for(lp = 0 ; lp < PT1_MAX_ISDB_T_INIT ; lp++){

memcpy(&wk, isdb_t_initial_pt1[lp], sizeof(WBLOCK));

wk.addr = addr;

i2c_write(regs, lock, &wk);

}

else if(cardtype == PT2) {

for(lp = 0 ; lp < PT2_MAX_ISDB_T_INIT ; lp++){

memcpy(&wk, isdb_t_initial_pt2[lp], sizeof(WBLOCK));

wk.addr = addr;

i2c_write(regs, lock, &wk);

}

int tuner_init(void __iomem *regs, int cardtype, struct mutex *lock, int tuner_no)

{

int rc ;

WBLOCK wk;

// ISDB-S/T初期化

memcpy(&wk, &com_initdata, sizeof(WBLOCK));

// 初期化(共通)

wk.addr = tuner_info[tuner_no].isdb_t ;

i2c_write(regs, lock, &wk);

wk.addr = tuner_info[tuner_no].isdb_s ;

i2c_write(regs, lock, &wk);

rc = init_isdb_s(regs, cardtype, lock, tuner_info[tuner_no].isdb_s);

if(rc < 0){

return rc ;

}

init_isdb_t(regs, cardtype, lock, tuner_info[tuner_no].isdb_t);

memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK));

wk.addr = tuner_info[tuner_no].isdb_s ;

i2c_write(regs, lock, &wk);

memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK));

wk.addr = tuner_info[tuner_no].isdb_t ;

i2c_write(regs, lock, &wk);

return 0 ;

}

void set_sleepmode(void __iomem* regs, struct mutex* lock, int address, int tuner_type, int type)

{

WBLOCK wk;

int tuner_no = -1;

int isdb = -1;

int is_pt2_tuner = 0;

if (pt2_address_to_tuner_isdb(address, tuner_type, &tuner_no, &isdb) == 0)

is_pt2_tuner = 1;

if (type == TYPE_WAKEUP) {

switch (tuner_type) {

case CHANNEL_TYPE_ISDB_S:

printk(KERN_INFO "PT1:ISDB-S Wakeup addr=0x%02x\n", address);

* PT2: turn ON only the required individual tuner rail

* before sending I2C wakeup commands.

if (is_pt2_tuner) {

pt2_set_tuner_sleep(regs, tuner_no, isdb, 0);

schedule_timeout_interruptible(msecs_to_jiffies(1000));

}

memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK));

wk.addr = address;

i2c_write(regs, lock, &wk);

memcpy(&wk, &isdb_s_wake2, sizeof(WBLOCK));

wk.addr = address;

i2c_write(regs, lock, &wk);

break;

case CHANNEL_TYPE_ISDB_T:

printk(KERN_INFO "PT1:ISDB-T Wakeup addr=0x%02x\n", address);

* PT2: turn ON only the required individual tuner rail

* before sending I2C wakeup commands.

if (is_pt2_tuner) {

pt2_set_tuner_sleep(regs, tuner_no, isdb, 0);

schedule_timeout_interruptible(msecs_to_jiffies(1000));

}

memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK));

wk.addr = address;

i2c_write(regs, lock, &wk);

memcpy(&wk, &isdb_t_wake2, sizeof(WBLOCK));

wk.addr = address;

i2c_write(regs, lock, &wk);

break;

}

if (type == TYPE_SLEEP) {

switch (tuner_type) {

case CHANNEL_TYPE_ISDB_S:

printk(KERN_INFO "PT1:ISDB-S Sleep addr=0x%02x\n", address);

memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK));

wk.addr = address;

i2c_write(regs, lock, &wk);

* PT2: after TC90512 sleep command, turn OFF the

* corresponding individual tuner rail.

if (is_pt2_tuner)

pt2_set_tuner_sleep(regs, tuner_no, isdb, 1);

break;

case CHANNEL_TYPE_ISDB_T:

printk(KERN_INFO "PT1:ISDB-T Sleep addr=0x%02x\n", address);

memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK));

wk.addr = address;

i2c_write(regs, lock, &wk);

* PT2: after TC90512 sleep command, turn OFF the

* corresponding individual tuner rail.

if (is_pt2_tuner)

pt2_set_tuner_sleep(regs, tuner_no, isdb, 1);

break;

}

int bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel)

{

int lp ;

int tmcclock = FALSE ;

WBLOCK wk;

__u32 val ;

if(channel >= MAX_BS_CHANNEL){

return -EIO ;

}

// ISDB-S PLLロック

for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){

memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK));

wk.addr = addr ;

i2c_write(regs, lock, &wk);

}

// PLLロック確認

// チェック用

for(lp = 0 ; lp < 200 ; lp++){

memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){

tmcclock = TRUE ;

break ;

}

if(tmcclock == FALSE){

printk(KERN_INFO "PLL LOCK ERROR\n");

return -EIO;

}

memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK));

wk.addr = addr;

i2c_write(regs, lock, &wk);

tmcclock = FALSE ;

for(lp = 0 ; lp < 200 ; lp++){

memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){

tmcclock = TRUE ;

break ;

}

if(tmcclock == FALSE){

printk(KERN_INFO "TMCC LOCK ERROR\n");

return -EIO;

}

return 0 ;

}

int ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id)

{

int lp ;

WBLOCK wk;

__u32 val ;

union{

__u8 ts[2];

__u16 tsid;

}uts_id ;

uts_id.tsid = ts_id ;

memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK));

wk.addr = addr;

// TS-ID設定

wk.value[1] = uts_id.ts[1];

wk.value[2] = uts_id.ts[0];

i2c_write(regs, lock, &wk);

for(lp = 0 ; lp < 100 ; lp++){

memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 2);

if((val & 0xFFFF) == ts_id){

return 0 ;

}

printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id);

return -EIO ;

}

int bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc)

{

int lp ;

int lp2;

WBLOCK wk;

__u32 val ;

ISDB_S_TS_ID *tsid ;

union{

__u8 slot[4];

__u32 u32slot;

}ts_slot ;

union{

__u16 ts[2];

__u32 tsid;

}ts_id ;

if(channel >= MAX_BS_CHANNEL){

printk(KERN_INFO "Invalid Channel(%d)\n", channel);

return -EIO ;

}

val = bs_frequency(regs, lock, addr, channel);

if(val == -EIO){

return val ;

}

tsid = &tmcc->ts_id[0] ;

// 該当周波数のTS-IDを取得

for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){

for(lp2 = 0 ; lp2 < 100 ; lp2++){

memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK));

wk.addr = addr;

ts_id.tsid = i2c_read(regs, lock, &wk, 4);

// TS-IDが0の場合は再取得する

if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){

break ;

}

tsid->ts_id = ts_id.ts[1] ;

tsid += 1;

tsid->ts_id = ts_id.ts[0] ;

tsid += 1;

}

memcpy(&wk, &bs_get_agc, sizeof(WBLOCK));

wk.addr = addr;

tmcc->agc = i2c_read(regs, lock, &wk, 1);

// TS-ID別の情報を取得

tsid = &tmcc->ts_id[0] ;

for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){

// TS-IDなし=0XFFFF

if(tsid->ts_id == 0xFFFF){

continue ;

}

ts_lock(regs, lock, addr, tsid->ts_id);

//スロット取得

memcpy(&wk, &bs_get_slot, sizeof(WBLOCK));

wk.addr = addr;

ts_slot.u32slot = i2c_read(regs, lock, &wk, 3);

tsid->high_mode = 0;

tsid->low_slot = ts_slot.slot[0] ;

tsid->high_slot = ts_slot.slot[1] ;

tsid->low_mode = ts_slot.slot[2] ;

}

memcpy(&wk, &bs_get_clock, sizeof(WBLOCK));

wk.addr = addr;

tmcc->clockmargin = i2c_read(regs, lock, &wk, 1);

memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK));

wk.addr = addr;

tmcc->carriermargin = i2c_read(regs, lock, &wk, 1);

return 0 ;

}

int isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr)

{

WBLOCK wk;

__u32 val ;

__u32 val2;

int val3 ;

memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK));

wk.addr = addr;

val2 = i2c_read(regs, lock, &wk, 1);

val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF));

return val3 ;

}

__u32 getfrequency_add(__u32 channel)

{

int lp ;

for(lp = 0 ; lp < 10 ; lp++){

if(channel <= isdb_t_freq_add[lp].pos){

return isdb_t_freq_add[lp].add_freq ;

}

return 0 ;

}

__u32 getfrequency(__u32 channel, int addfreq)

{

__u32 frequencyoffset = 0;

__u32 frequencyOffset = 0;

if (12 <= channel)

frequencyoffset += 2;

if (17 <= channel)

frequencyoffset -= 2;

if (63 <= channel){

frequencyoffset += 2;

}

#if 0

return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400;

#endif

frequencyOffset = 93 + channel * 6 + frequencyoffset;

frequencyOffset = 7 * (frequencyOffset + addfreq);

return frequencyOffset + 400;

}

int isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq)

{

int lp ;

WBLOCK wk;

__u32 val ;

int tmcclock = FALSE ;

union{

__u8 charfreq[2];

__u16 freq;

}freq[2] ;

if(channel >= MAX_ISDB_T_CHANNEL){

return -EIO ;

}

freq[0].freq = getfrequency(channel, addfreq);

freq[1].freq = getfrequency_add(channel);

//指定周波数

memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK));

wk.addr = addr ;

// 計算した周波数を設定

wk.value[wk.count] = freq[0].charfreq[1];

wk.count += 1 ;

wk.value[wk.count] = freq[0].charfreq[0];

wk.count += 1 ;

// 計算した周波数付加情報を設定

wk.value[wk.count] = freq[1].charfreq[1];

wk.count += 1 ;

wk.value[wk.count] = freq[1].charfreq[0];

wk.count += 1 ;

i2c_write(regs, lock, &wk);

for(lp = 0 ; lp < 100 ; lp++){

memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){

tmcclock = TRUE ;

break ;

}

if(tmcclock != TRUE){

printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val);

return -EIO ;

}

memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK));

wk.addr = addr ;

i2c_write(regs, lock, &wk);

tmcclock = FALSE ;

for(lp = 0 ; lp < 1000 ; lp++){

memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){

tmcclock = TRUE ;

break ;

}

if(tmcclock != TRUE){

return -EIO ;

}

return 0 ;

}

int isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr)

{

__u32 val ;

__u32 val2;

__u32 val3;

WBLOCK wk;

memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

printk(KERN_INFO "CN(1)Val(%x)\n", val);

memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK));

wk.addr = addr;

val2 = i2c_read(regs, lock, &wk, 1);

val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF));

return val3 ;

}

#if 0

int isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc)

{

int lp ;

int rc ;

int lp2 ;

WBLOCK wk;

__u32 val ;

printk(KERN_INFO "Channel(%d) Start\n", channel);

if(channel >= MAX_ISDB_T_CHANNEL){

return -EIO ;

}

rc = isdb_t_frequency(regs, lock, addr, channel);

if(rc < 0){

return -EIO ;

}

for(lp = 0 ; lp < 100 ; lp++){

memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 4);

if((val & 0xFF) != 0){

break ;

}

printk(KERN_INFO "TMCC(1)Val(%x)\n", val);

for(lp = 0 ; lp < 100 ; lp++){

memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 4);

if((val & 0xFF) != 0){

break ;

}

printk(KERN_INFO "TMCC(2)Val(%x)\n", val);

memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

printk(KERN_INFO "CN(1)Val(%x)\n", val);

memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

printk(KERN_INFO "CN(2)Val(%x)\n", val);

memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

printk(KERN_INFO "AGC(1)Val(%x)\n", val);

memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK));

wk.addr = addr;

val = i2c_read(regs, lock, &wk, 1);

printk(KERN_INFO "AGC(2)Val(%x)\n", val);

return 0;

}

#endif

/* -*- tab-width: 4; indent-tabs-mode: t -*- */
/* pt1-pci.c: A PT1 on PCI bus driver for Linux. */
#include "version.h"

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/vmalloc.h>
#include <linux/version.h>
#include <linux/mutex.h>
#include <linux/uaccess.h>

#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)
#include <asm/system.h>
#endif
#include <asm/io.h>
#include <asm/irq.h>
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)
#include <asm/uaccess.h>
#endif

#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
#include <linux/freezer.h>
#else
#define set_freezable()
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
typedef struct pm_message {
        int event;
} pm_message_t;
#endif
#endif

#include <linux/kthread.h>
#include <linux/dma-mapping.h>

#include <linux/fs.h>
#include <linux/cdev.h>

#include <linux/ioctl.h>

#include	"pt1_com.h"
#include	"pt1_pci.h"
#include	"pt1_tuner.h"
#include	"pt1_i2c.h"
#include	"pt1_tuner_data.h"
#include	"pt1_ioctl.h"

#if LINUX_VERSION_CODE > KERNEL_VERSION(3,8,0)
#define __devinit
#define __devinitdata
#define __devexit
#define __devexit_p
#endif

#if LINUX_VERSION_CODE > KERNEL_VERSION(4,2,0)
#include <linux/vmalloc.h>
#endif

#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)
static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle)
{
	return dma_alloc_coherent(&hwdev->dev, size, dma_handle, GFP_KERNEL);
}

static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle)
{
	dma_free_coherent(&hwdev->dev, size, vaddr, dma_handle);
}

static inline int pci_set_dma_mask(struct pci_dev *hwdev, u64 mask)
{
	return dma_set_mask(&hwdev->dev, mask);
}
#endif

/* These identify the driver base version and may not be removed. */
static char version[] __devinitdata =
DRV_NAME ".c: " DRV_VERSION " " DRV_RELDATE " \n";

MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp and Yoshiki Yazawa yaz@honeyplanet.jp");
#define	DRIVER_DESC		"PCI earthsoft PT1/2 driver"
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");

static int debug = 7;			/* 1 normal messages, 0 quiet .. 7 verbose. */
static int lnb = 0;			/* LNB OFF:0 +11V:1 +15V:2 */

module_param(debug, int, 0);
module_param(lnb, int, 0);
MODULE_PARM_DESC(debug, "debug level (1-2)");
MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)");

#define VENDOR_EARTHSOFT 0x10ee
#define PCI_PT1_ID 0x211a
#define PCI_PT2_ID 0x222a

static struct pci_device_id pt1_pci_tbl[] = {
	{ VENDOR_EARTHSOFT, PCI_PT1_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
	{ VENDOR_EARTHSOFT, PCI_PT2_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, pt1_pci_tbl);
#define		DEV_NAME	"pt1video"

#define		PACKET_SIZE			188		// 1パケット長
#define		MAX_READ_BLOCK	4			// 1度に読み出す最大DMAバッファ数
#define		MAX_PCI_DEVICE		128		// 最大64枚
#define		DMA_SIZE	4096			// DMAバッファサイズ
#define		DMA_RING_SIZE	128			// number of DMA RINGS
#define		DMA_RING_MAX	511			// number of DMA entries in a RING(1023はNGで511まで)
#define		CHANNEL_DMA_SIZE	(2*1024*1024)	// 地デジ用(16Mbps)
#define		BS_CHANNEL_DMA_SIZE	(4*1024*1024)	// BS用(32Mbps)
#define		READ_SIZE	(16*DMA_SIZE)

typedef	struct	_DMA_CONTROL{
	dma_addr_t	ring_dma[DMA_RING_MAX] ;	// DMA情報
	__u32		*data[DMA_RING_MAX];
}DMA_CONTROL;

typedef	struct	_PT1_CHANNEL	PT1_CHANNEL;

typedef	struct	_pt1_device{
	unsigned long	mmio_start ;
	__u32			mmio_len ;
	void __iomem		*regs;
	struct mutex		lock ;
	dma_addr_t		ring_dma[DMA_RING_SIZE] ;	// DMA情報
	void			*dmaptr[DMA_RING_SIZE] ;
	struct	task_struct	*kthread;
	dev_t			dev ;
	int			card_number;
	__u32			base_minor ;
	struct	cdev	cdev[MAX_CHANNEL];
	wait_queue_head_t	dma_wait_q ;// for poll on reading
	DMA_CONTROL		*dmactl[DMA_RING_SIZE];
	PT1_CHANNEL		*channel[MAX_CHANNEL];
	int			cardtype;
} PT1_DEVICE;

typedef	struct	_MICRO_PACKET{
	char	data[3];
	char	head ;
}MICRO_PACKET;

struct	_PT1_CHANNEL{
	__u32			valid ;			// 使用中フラグ
	__u32			address ;		// I2Cアドレス
	__u32			channel ;		// チャネル番号
	int			type ;			// チャネルタイプ
	__u32			packet_size ;	// パケットサイズ
	__u32			drop ;			// パケットドロップ数
	struct mutex		lock ;			// CH別mutex_lock用
	__u32			size ;			// DMAされたサイズ
	__u32			maxsize ;		// DMA用バッファサイズ
	__u32			bufsize ;		// チャネルに割り振られたサイズ
	__u32			overflow ;		// オーバーフローエラー発生
	__u32			counetererr ;	// 転送カウンタ１エラー
	__u32			transerr ;		// 転送エラー
	__u32			minor ;			// マイナー番号
	__u8			*buf;			// CH別受信メモリ
	__u32			pointer;
	__u8			req_dma ;		// 溢れたチャネル
	__u8			packet_buf[PACKET_SIZE] ;		// 溢れたチャネル
	PT1_DEVICE		*ptr ;			// カード別情報
	wait_queue_head_t	wait_q ;	// for poll on reading
};

// I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T)
int		i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T};
int		real_channel[MAX_CHANNEL] = {0, 2, 1, 3};
int		channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S,
									CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T};

static	PT1_DEVICE	*device[MAX_PCI_DEVICE];
static struct class	*pt1video_class;

#define		PT1MAJOR	251
#define		DRIVERNAME	"pt1video"

static	void	reset_dma(PT1_DEVICE *dev_conf)
{

	int		lp ;
	__u32	addr ;
	int		ring_pos = 0;
	int		data_pos = 0 ;
	__u32	*dataptr ;

	// データ初期化
	for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){
		for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){
			dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];
			dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;
		}
	}
	// 転送カウンタをリセット
	writel(0x00000010, dev_conf->regs);
	// 転送カウンタをインクリメント
	for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
		writel(0x00000020, dev_conf->regs);
	}

	addr = (int)dev_conf->ring_dma[0] ;
	addr >>= 12 ;
	// DMAバッファ設定
	writel(addr, dev_conf->regs + DMA_ADDR);
	// DMA開始
	writel(0x0c000040, dev_conf->regs);

}
static	int		pt1_thread(void *data)
{
	PT1_DEVICE	*dev_conf = data ;
	PT1_CHANNEL	*channel ;
	int		ring_pos = 0;
	int		data_pos = 0 ;
	int		lp ;
	int		chno ;
	int		dma_channel ;
	int		packet_pos ;
	__u32	*dataptr ;
	__u32	*curdataptr ;
	__u32	val ;
	union	mpacket{
		__u32	val ;
		MICRO_PACKET	packet ;
	}micro;

	set_freezable();
	reset_dma(dev_conf);
	printk(KERN_INFO "pt1_thread run\n");

	for(;;){
		if(kthread_should_stop()){
			break ;
		}

		for(;;){
			dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];
			// データあり？
			if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){
				break ;
			}
			micro.val = *dataptr ;
			curdataptr = dataptr ;
			data_pos += 1 ;
			for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){
				micro.val = *dataptr ;
				dma_channel = ((micro.packet.head >> 5) & 0x07);
				//チャネル情報不正
				if(dma_channel > MAX_CHANNEL){
					printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel);
					continue ;
				}
				chno = real_channel[(((micro.packet.head >> 5) & 0x07) - 1)];
				packet_pos = ((micro.packet.head >> 2) & 0x07);
				channel = dev_conf->channel[chno] ;
				//  エラーチェック
				if((micro.packet.head & MICROPACKET_ERROR)){
					val = readl(dev_conf->regs);
					if((val & BIT_RAM_OVERFLOW)){
						channel->overflow += 1 ;
					}
					if((val & BIT_INITIATOR_ERROR)){
						channel->counetererr += 1 ;
					}
					if((val & BIT_INITIATOR_WARNING)){
						channel->transerr += 1 ;
					}
					// 初期化して先頭から
					reset_dma(dev_conf);
					ring_pos = data_pos = 0 ;
					break ;
				}
				// 未使用チャネルは捨てる
				if(channel->valid == FALSE){
					continue ;
				}
				mutex_lock(&channel->lock);
				// あふれたら読み出すまで待つ
				while(1){
					if(channel->size >= (channel->maxsize - PACKET_SIZE - 4)){
						// 該当チャンネルのDMA読みだし待ちにする
						wake_up(&channel->wait_q);
						channel->req_dma = TRUE ;
						mutex_unlock(&channel->lock);
						// タスクに時間を渡す為中断
						wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE),
											msecs_to_jiffies(500));
						mutex_lock(&channel->lock);
						channel->drop += 1 ;
					}else{
						break ;
					}
				}
				// 先頭で、一時バッファに残っている場合
				if((micro.packet.head & 0x02) &&  (channel->packet_size != 0)){
					channel->packet_size = 0 ;
				}
				// データコピー
				channel->packet_buf[channel->packet_size]   = micro.packet.data[2];
				channel->packet_buf[channel->packet_size+1] = micro.packet.data[1];
				channel->packet_buf[channel->packet_size+2] = micro.packet.data[0];
				channel->packet_size += 3;

				// パケットが出来たらコピーする
				if(channel->packet_size >= PACKET_SIZE){
					if (channel->pointer + channel->size >= channel->maxsize) {
						// リングバッファの境界を越えていてリングバッファの先頭に戻っている場合
						// channel->pointer + channel->size - channel->maxsize でリングバッファ先頭からのアドレスになる
						memcpy(&channel->buf[channel->pointer + channel->size - channel->maxsize], channel->packet_buf, PACKET_SIZE);
					} else if (channel->pointer + channel->size + PACKET_SIZE > channel->maxsize) {
						// リングバッファの境界をまたぐように書き込まれる場合
						// リングバッファの境界まで書き込み
						__u32 tmp_size = channel->maxsize - (channel->pointer + channel->size);
						memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, tmp_size);
						// 先頭に戻って書き込み
						memcpy(channel->buf, &channel->packet_buf[tmp_size], PACKET_SIZE - tmp_size);
					} else {
						// リングバッファ内で収まる場合
						// 通常の書き込み
						memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, PACKET_SIZE);
					}
					channel->size += PACKET_SIZE ;
					channel->packet_size = 0 ;
				}
				mutex_unlock(&channel->lock);
			}
			curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;

			if(data_pos >= DMA_RING_MAX){
				data_pos = 0;
				ring_pos += 1 ;
				// DMAリングが変わった場合はインクリメント
				writel(0x00000020, dev_conf->regs);
				if(ring_pos >= DMA_RING_SIZE){
					ring_pos = 0 ;
				}
			}

			// 頻度を落す(wait until READ_SIZE)
			for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
				channel = dev_conf->channel[real_channel[lp]] ;
				if((channel->size >= READ_SIZE) && (channel->valid == TRUE)){
					wake_up(&channel->wait_q);
				}
			}
		}
		schedule_timeout_interruptible(msecs_to_jiffies(100));
	}
	return 0 ;
}

static int pt1_open(struct inode* inode, struct file* file)
{
	int		major = imajor(inode);
	int		minor = iminor(inode);
	int		lp;
	int		lp2;
	PT1_CHANNEL* channel;

	for (lp = 0; lp < MAX_PCI_DEVICE; lp++) {
		if (device[lp] == NULL) {
			return -EIO;
		}

		if (MAJOR(device[lp]->dev) == major &&
			device[lp]->base_minor <= minor &&
			device[lp]->base_minor + MAX_CHANNEL > minor) {

			mutex_lock(&device[lp]->lock);
			for (lp2 = 0; lp2 < MAX_CHANNEL; lp2++) {
				channel = device[lp]->channel[lp2];
				if (channel->minor == minor) {
					if (channel->valid == TRUE) {
						mutex_unlock(&device[lp]->lock);
						return -EIO;
					}

					/* wake tuner up */
					set_sleepmode(channel->ptr->regs, &channel->lock,
						channel->address, channel->type,
						TYPE_WAKEUP);
					schedule_timeout_interruptible(msecs_to_jiffies(100));

					channel->drop = 0;
					channel->valid = TRUE;
					channel->overflow = 0;
					channel->counetererr = 0;
					channel->transerr = 0;
					channel->packet_size = 0;
					file->private_data = channel;
					mutex_lock(&channel->lock);
					// データ初期化
					channel->size = 0;
					mutex_unlock(&channel->lock);
					mutex_unlock(&device[lp]->lock);
					return 0;
				}
			}
		}
	}
	return -EIO;
}

static int pt1_release(struct inode *inode, struct file *file)
{
	PT1_CHANNEL	*channel = file->private_data;

	mutex_lock(&channel->ptr->lock);
	SetStream(channel->ptr->regs, channel->channel, FALSE);
	channel->valid = FALSE ;
	printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop,
						channel->overflow, channel->counetererr, channel->transerr);
	channel->overflow = 0 ;
	channel->counetererr = 0 ;
	channel->transerr = 0 ;
	channel->drop = 0 ;
	// 停止している場合は起こす
	if(channel->req_dma == TRUE){
		channel->req_dma = FALSE ;
		wake_up(&channel->ptr->dma_wait_q);
	}

	/* send tuner to sleep */
	set_sleepmode(channel->ptr->regs, &channel->lock,
				  channel->address, channel->type, TYPE_SLEEP);
	schedule_timeout_interruptible(msecs_to_jiffies(100));

	mutex_unlock(&channel->ptr->lock);

	return 0;
}

static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos)
{
	PT1_CHANNEL	*channel = file->private_data;
	__u32	size ;
	unsigned long dummy;

	// READ_SIZE単位で起こされるのを待つ(CPU負荷対策)
	if(channel->size < READ_SIZE){
		wait_event_timeout(channel->wait_q, (channel->size >= READ_SIZE),
							msecs_to_jiffies(500));
	}
	mutex_lock(&channel->lock);
	if(!channel->size){
		size = 0 ;
	}else{
		__u32 tmp_size = 0;
		if (cnt < channel->size) {
			// バッファにあるデータより小さい読み込みの場合
			size = cnt;
		} else {
			// バッファにあるデータ以上の読み込みの場合
			size = channel->size;
		}
		if (channel->maxsize <= size + channel->pointer) {
			// リングバッファの境界を越える場合
			tmp_size = channel->maxsize - channel->pointer;
			// 境界までコピー
			dummy = copy_to_user(buf, &channel->buf[channel->pointer], tmp_size);
			// 残りをコピー
			dummy = copy_to_user(&buf[tmp_size], channel->buf, size - tmp_size);
			channel->pointer = size - tmp_size;
		} else {
			// 普通にコピー
			dummy = copy_to_user(buf, &channel->buf[channel->pointer], size);
			channel->pointer += size;
		}
		channel->size -= size;
	}
	// 読み終わったかつ使用しているのがが4K以下
	if(channel->req_dma == TRUE){
		channel->req_dma = FALSE ;
		wake_up(&channel->ptr->dma_wait_q);
	}
	mutex_unlock(&channel->lock);
	return size ;
}
static	int		SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq)
{

	switch(channel->type){
		case CHANNEL_TYPE_ISDB_S:
			{
				ISDB_S_TMCC		tmcc ;
				if(bs_tune(channel->ptr->regs,
						&channel->ptr->lock,
						channel->address,
						freq->frequencyno,
						&tmcc) < 0){
					return -EIO ;
				}

#if 0
				printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF));
				printk(KERN_INFO "carriermargin  = (%x)\n", (tmcc.carriermargin & 0xFF));
				{
					int lp;
					for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){
						if(tmcc.ts_id[lp].ts_id == 0xFFFF){
							continue ;
						}
						printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id);
						printk(KERN_INFO "mode (low/high) = (%x:%x)\n",
							   tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode);
						printk(KERN_INFO "slot (low/high) = (%x:%x)\n",
							   tmcc.ts_id[lp].low_slot,
							   tmcc.ts_id[lp].high_slot);
					}
				}
#endif
				ts_lock(channel->ptr->regs,
						&channel->ptr->lock,
						channel->address,
						tmcc.ts_id[freq->slot].ts_id);
			}
			break ;
		case CHANNEL_TYPE_ISDB_T:
			{
				if(isdb_t_frequency(channel->ptr->regs,
						&channel->ptr->lock,
						channel->address,
						freq->frequencyno, freq->slot) < 0){
					return -EINVAL ;
				}
			}
	}
	return 0 ;
}

static int count_used_bs_tuners(void)
{
	int count = 0;
	int dev_idx;
	int ch_idx;
	PT1_DEVICE* dev;

	for (dev_idx = 0; dev_idx < MAX_PCI_DEVICE; dev_idx++) {
		dev = device[dev_idx];
		if (!dev)
			continue;

		for (ch_idx = 0; ch_idx < MAX_CHANNEL; ch_idx++) {
			if (dev->channel[ch_idx] &&
				dev->channel[ch_idx]->type == CHANNEL_TYPE_ISDB_S &&
				dev->channel[ch_idx]->valid)
				count++;
		}
	}

	printk(KERN_INFO "used bs tuners on all devices = %d\n", count);
	return count;
}

static long pt1_do_ioctl(struct file  *file, unsigned int cmd, unsigned long arg0)
{
	PT1_CHANNEL	*channel = file->private_data;
	int		signal = 0;
	unsigned long	dummy;
	void		*arg = (void *)arg0;
	int		lnb_eff, lnb_usr;
	char *voltage[] = {"0V", "11V", "15V"};
	int count;

	switch(cmd){
		case SET_CHANNEL:
			{
				FREQUENCY	freq ;
				dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY));
				return SetFreq(channel, &freq);
			}
		case START_REC:
			SetStream(channel->ptr->regs, channel->channel, TRUE);
			return 0 ;
		case STOP_REC:
			SetStream(channel->ptr->regs, channel->channel, FALSE);
			schedule_timeout_interruptible(msecs_to_jiffies(100));
			return 0 ;
		case GET_SIGNAL_STRENGTH:
			switch(channel->type){
				case CHANNEL_TYPE_ISDB_S:
					signal = isdb_s_read_signal_strength(channel->ptr->regs,
												&channel->ptr->lock,
												channel->address);
					break ;
				case CHANNEL_TYPE_ISDB_T:
					signal = isdb_t_read_signal_strength(channel->ptr->regs,
												&channel->ptr->lock, channel->address);
					break ;
			}
			dummy = copy_to_user(arg, &signal, sizeof(int));
			return 0 ;
		case LNB_ENABLE:
			count = count_used_bs_tuners();

			if (count <= 1) {
				PT1_DEVICE* lnb_dev;

				lnb_dev = device[0];
				if (!lnb_dev)
					return -EIO;

				lnb_usr = (int)arg0;
				lnb_eff = lnb_usr ? lnb_usr : lnb;

				/*
				 * Actual LNB power is supplied only from device[0].
				 */
				settuner_reset(lnb_dev->regs,
					lnb_dev->cardtype,
					lnb_eff,
					TUNER_POWER_ON_RESET_DISABLE);

				schedule_timeout_interruptible(msecs_to_jiffies(1000));
				printk(KERN_INFO
					"PT1:LNB on %s master=%p request=%p\n",
					voltage[lnb_eff], lnb_dev, channel->ptr);
			}
			return 0;

		case LNB_DISABLE:
			count = count_used_bs_tuners();

			if (count <= 1) {
				PT1_DEVICE* lnb_dev;

				lnb_dev = device[0];
				if (!lnb_dev)
					return -EIO;

				/*
				 * Actual LNB power is disabled only on device[0].
				 */
				settuner_reset(lnb_dev->regs,
					lnb_dev->cardtype,
					LNB_OFF,
					TUNER_POWER_ON_RESET_DISABLE);

				printk(KERN_INFO
					"PT1:LNB off master=%p request=%p\n",
					lnb_dev, channel->ptr);
			}
			return 0;
	}
	return -EINVAL;
}

static long pt1_unlocked_ioctl(struct file  *file, unsigned int cmd, unsigned long arg0)
{
	PT1_CHANNEL	*channel = file->private_data;
	long ret;

	mutex_lock(&channel->lock);
	ret = pt1_do_ioctl(file, cmd, arg0);
	mutex_unlock(&channel->lock);

	return ret;
}

static long pt1_compat_ioctl(struct file  *file, unsigned int cmd, unsigned long arg0)
{
	long ret;
	/* should do 32bit <-> 64bit conversion here? --yaz */
	ret = pt1_unlocked_ioctl(file, cmd, arg0);

	return ret;
}

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
static int pt1_ioctl(struct inode *inode, struct file  *file, unsigned int cmd, unsigned long arg0)
{
	int ret;
	ret = (int)pt1_do_ioctl(file, cmd, arg0);
	return ret;
}
#endif

/*
*/
static const struct file_operations pt1_fops = {
	.owner		=	THIS_MODULE,
	.open		=	pt1_open,
	.release	=	pt1_release,
	.read		=	pt1_read,
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
	.ioctl		=	pt1_ioctl,
#else
	.unlocked_ioctl		=	pt1_unlocked_ioctl,
	.compat_ioctl		=	pt1_compat_ioctl,
#endif
	.llseek		=	no_llseek,
};

int		pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
{
	int		lp ;
	int		lp2 ;
	DMA_CONTROL		*dmactl;
	__u32	*dmaptr ;
	__u32	addr  ;
	__u32	*ptr ;

	//DMAリング作成
	for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
		ptr = dev_conf->dmaptr[lp];
		if(lp ==  (DMA_RING_SIZE - 1)){
			addr = (__u32)dev_conf->ring_dma[0];
		}else{
			addr = (__u32)dev_conf->ring_dma[(lp + 1)];
		}
		addr >>= 12 ;
		memcpy(ptr, &addr, sizeof(__u32));
		ptr += 1 ;

		dmactl = dev_conf->dmactl[lp];
		for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
			dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]);
			if(dmaptr == NULL){
				printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
				return -1 ;
			}
			dmactl->data[lp2] = dmaptr ;
			// DMAデータエリア初期化
			dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ;
			addr = (__u32)dmactl->ring_dma[lp2];
			addr >>= 12 ;
			memcpy(ptr, &addr, sizeof(__u32));
			ptr += 1 ;
		}
	}
	return 0 ;
}
int		pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
{
	int		lp ;
	void	*ptr ;

	for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
		ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]);
		if(ptr == NULL){
			printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
			return -1 ;
		}
		dev_conf->dmaptr[lp] = ptr ;
	}

	return pt1_makering(pdev, dev_conf);
}
int		pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
{

	int		lp ;
	int		lp2 ;

	for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
		if(dev_conf->dmaptr[lp] != NULL){
			pci_free_consistent(pdev, DMA_SIZE,
								dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]);
			for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
				if((dev_conf->dmactl[lp])->data[lp2] != NULL){
					pci_free_consistent(pdev, DMA_SIZE,
										(dev_conf->dmactl[lp])->data[lp2],
										(dev_conf->dmactl[lp])->ring_dma[lp2]);
				}
			}
		}
	}
	return 0 ;
}
static int __devinit pt1_pci_init_one (struct pci_dev *pdev,
				     const struct pci_device_id *ent)
{
	int			rc ;
	int			lp ;
	int			minor ;
	u16			cmd ;
	PT1_DEVICE	*dev_conf ;
	PT1_CHANNEL	*channel ;
	int i;
	struct resource *dummy;

	rc = pci_enable_device(pdev);
	if (rc)
		return rc;
	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
	if (rc) {
		printk(KERN_ERR "PT1:DMA MASK ERROR");
		return rc;
	}

	pci_read_config_word(pdev, PCI_COMMAND, &cmd);
	if (!(cmd & PCI_COMMAND_MASTER)) {
		printk(KERN_INFO "Attempting to enable Bus Mastering\n");
		pci_set_master(pdev);
		pci_read_config_word(pdev, PCI_COMMAND, &cmd);
		if (!(cmd & PCI_COMMAND_MASTER)) {
			printk(KERN_ERR "Bus Mastering is not enabled\n");
			return -EIO;
		}
	}
	printk(KERN_INFO "Bus Mastering Enabled.\n");

	dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL);
	if(!dev_conf){
		printk(KERN_ERR "PT1:out of memory !");
		return -ENOMEM ;
	}
	for (i = 0; i < DMA_RING_SIZE; i++) {
		dev_conf->dmactl[i] = kzalloc(sizeof(DMA_CONTROL), GFP_KERNEL);
		if(!dev_conf->dmactl[i]){
			int j;
			for (j = 0; j < i; j++) {
				kfree(dev_conf->dmactl[j]);
			}
			kfree(dev_conf);
			printk(KERN_ERR "PT1:out of memory !");
			return -ENOMEM ;
		}
	}

	switch(ent->device) {
	case PCI_PT1_ID:
		dev_conf->cardtype = PT1;
		break;
	case PCI_PT2_ID:
		dev_conf->cardtype = PT2;
		break;
	default:
		break;
	}

	// PCIアドレスをマップする
	dev_conf->mmio_start = pci_resource_start(pdev, 0);
	dev_conf->mmio_len = pci_resource_len(pdev, 0);
	dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME);
	if (!dummy) {
		printk(KERN_ERR "PT1:cannot request iomem  (0x%llx).\n", (unsigned long long) dev_conf->mmio_start);
		goto out_err_regbase;
	}

	dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len);
	if (!dev_conf->regs){
		printk(KERN_ERR "pt1:Can't remap register area.\n");
		goto out_err_regbase;
	}
	// 初期化処理
	if(xc3s_init(dev_conf->regs, dev_conf->cardtype)){
		printk(KERN_ERR "Error xc3s_init\n");
		goto out_err_fpga;
	}
	// チューナリセット
	settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE);
	schedule_timeout_interruptible(msecs_to_jiffies(100));

	settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
	schedule_timeout_interruptible(msecs_to_jiffies(100));
	mutex_init(&dev_conf->lock);

	// Tuner 初期化処理
	for(lp = 0 ; lp < MAX_TUNER ; lp++){
		rc = tuner_init(dev_conf->regs, dev_conf->cardtype, &dev_conf->lock, lp);
		if(rc < 0){
			printk(KERN_ERR "Error tuner_init\n");
			goto out_err_fpga;
		}
	}
	// 初期化完了
	for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
		set_sleepmode(dev_conf->regs, &dev_conf->lock,
						i2c_address[lp], channeltype[lp], TYPE_SLEEP);

		schedule_timeout_interruptible(msecs_to_jiffies(100));
	}
	rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME);
	if(rc < 0){
		goto out_err_fpga;
	}

	// 初期化
	init_waitqueue_head(&dev_conf->dma_wait_q);

	minor = MINOR(dev_conf->dev) ;
	dev_conf->base_minor = minor ;
	for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){
		printk(KERN_INFO "PT1:device[%d]=%p\n", lp, device[lp]);
		if(device[lp] == NULL){
			device[lp] = dev_conf ;
			dev_conf->card_number = lp;
			break ;
		}
	}
	for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
		cdev_init(&dev_conf->cdev[lp], &pt1_fops);
		dev_conf->cdev[lp].owner = THIS_MODULE;
		cdev_add(&dev_conf->cdev[lp],
			 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1);
		channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL);
		if(!channel){
			printk(KERN_ERR "PT1:out of memory !");
			return -ENOMEM ;
		}

		// 共通情報
		mutex_init(&channel->lock);
		// 待ち状態を解除
		channel->req_dma = FALSE ;
		// マイナー番号設定
		channel->minor = MINOR(dev_conf->dev) + lp ;
		// 対象のI2Cデバイス
		channel->address = i2c_address[lp] ;
		channel->type = channeltype[lp] ;
		// 実際のチューナ番号
		channel->channel = real_channel[lp] ;
		channel->ptr = dev_conf ;
		channel->size = 0 ;
		dev_conf->channel[lp] = channel ;

		init_waitqueue_head(&channel->wait_q);

		switch(channel->type){
			case CHANNEL_TYPE_ISDB_T:
				channel->maxsize = CHANNEL_DMA_SIZE ;
				channel->buf = vmalloc(CHANNEL_DMA_SIZE);
				channel->pointer = 0;
				break ;
			case CHANNEL_TYPE_ISDB_S:
				channel->maxsize = BS_CHANNEL_DMA_SIZE ;
				channel->buf = vmalloc(BS_CHANNEL_DMA_SIZE);
				channel->pointer = 0;
				break ;
		}
		if(channel->buf == NULL){
			goto out_err_v4l;
		}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
		printk(KERN_INFO "PT1:card_number = %d\n",
		       dev_conf->card_number);
		device_create(pt1video_class,
			      NULL,
			      MKDEV(MAJOR(dev_conf->dev),
				    (MINOR(dev_conf->dev) + lp)),
			      NULL,
			      "pt1video%u",
			      MINOR(dev_conf->dev) + lp +
			      dev_conf->card_number * MAX_CHANNEL);
#else
		device_create(pt1video_class,
			      NULL,
			      MKDEV(MAJOR(dev_conf->dev),
				    (MINOR(dev_conf->dev) + lp)),
			      "pt1video%u",
			      MINOR(dev_conf->dev) + lp +
			      dev_conf->card_number * MAX_CHANNEL);
#endif

#if 0
		dev_conf->vdev[lp] = video_device_alloc();
		memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template));
		video_set_drvdata(dev_conf->vdev[lp], channel);
		video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1);
#endif
	}

	if(pt1_dma_init(pdev, dev_conf) < 0){
		goto out_err_dma;
	}
	dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1");
	pci_set_drvdata(pdev, dev_conf);
	return 0;

out_err_dma:
	pt1_dma_free(pdev, dev_conf);
out_err_v4l:
	for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
		if(dev_conf->channel[lp] != NULL){
			if(dev_conf->channel[lp]->buf != NULL){
				vfree(dev_conf->channel[lp]->buf);
			}
			kfree(dev_conf->channel[lp]);
		}
	}
out_err_fpga:
	writel(0xb0b0000, dev_conf->regs);
	writel(0, dev_conf->regs + CFG_REGS_ADDR);
	iounmap(dev_conf->regs);
	release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
	for (i = 0; i < DMA_RING_SIZE; i++) {
		kfree(dev_conf->dmactl[i]);
	}
	kfree(dev_conf);
out_err_regbase:
	return -EIO;

}

static void __devexit pt1_pci_remove_one(struct pci_dev *pdev)
{

	int		lp ;
	__u32	val ;
	PT1_DEVICE	*dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev);
	int		i;

	if(dev_conf){
		if(dev_conf->kthread) {
			kthread_stop(dev_conf->kthread);
			dev_conf->kthread = NULL;
		}

		// DMA終了
		writel(0x08080000, dev_conf->regs);
		for(lp = 0 ; lp < 10 ; lp++){
			val = readl(dev_conf->regs);
			if(!(val & (1 << 6))){
				break ;
			}
			schedule_timeout_interruptible(msecs_to_jiffies(100));
		}
		pt1_dma_free(pdev, dev_conf);
		for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
			if(dev_conf->channel[lp] != NULL){
				cdev_del(&dev_conf->cdev[lp]);
				vfree(dev_conf->channel[lp]->buf);
				kfree(dev_conf->channel[lp]);
			}
			device_destroy(pt1video_class,
				       MKDEV(MAJOR(dev_conf->dev),
					     (MINOR(dev_conf->dev) + lp)));
		}

		unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL);
		writel(0xb0b0000, dev_conf->regs);
		writel(0, dev_conf->regs + CFG_REGS_ADDR);
		settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_OFF);
		release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
		iounmap(dev_conf->regs);
		for (i = 0; i < DMA_RING_SIZE; i++) {
			kfree(dev_conf->dmactl[i]);
		}
		device[dev_conf->card_number] = NULL;
		kfree(dev_conf);
	}
	pci_set_drvdata(pdev, NULL);
}
#ifdef CONFIG_PM

static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state)
{
	return 0;
}

static int pt1_pci_resume (struct pci_dev *pdev)
{
	return 0;
}

#endif /* CONFIG_PM */


static struct pci_driver pt1_driver = {
	.name		= DRV_NAME,
	.probe		= pt1_pci_init_one,
	.remove		= __devexit_p(pt1_pci_remove_one),
	.id_table	= pt1_pci_tbl,
#ifdef CONFIG_PM
	.suspend	= pt1_pci_suspend,
	.resume		= pt1_pci_resume,
#endif /* CONFIG_PM */

};


static int __init pt1_pci_init(void)
{
	printk(KERN_INFO "%s", version);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,0)
	pt1video_class = class_create(DRIVERNAME);
#else
	pt1video_class = class_create(THIS_MODULE, DRIVERNAME);
#endif
	if (IS_ERR(pt1video_class))
		return PTR_ERR(pt1video_class);
	return pci_register_driver(&pt1_driver);
}


static void __exit pt1_pci_cleanup(void)
{
	pci_unregister_driver(&pt1_driver);
	class_destroy(pt1video_class);
}

module_init(pt1_pci_init);
module_exit(pt1_pci_cleanup);

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/* -*- tab-width: 4; indent-tabs-mode: t -*- */

/* pt1-pci.c: A PT1 on PCI bus driver for Linux. */

#include "version.h"

#include <linux/module.h>

#include <linux/kernel.h>

#include <linux/errno.h>

#include <linux/pci.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/vmalloc.h>

#include <linux/version.h>

#include <linux/mutex.h>

#include <linux/uaccess.h>

#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)

#include <asm/system.h>

#endif

#include <asm/io.h>

#include <asm/irq.h>

#if LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)

#include <asm/uaccess.h>

#endif

#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)

#include <linux/freezer.h>

#else

#define set_freezable()

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)

typedef struct pm_message {

int event;

} pm_message_t;

#endif

#include <linux/kthread.h>

#include <linux/dma-mapping.h>

#include <linux/fs.h>

#include <linux/cdev.h>

#include <linux/ioctl.h>

#include "pt1_com.h"

#include "pt1_pci.h"

#include "pt1_tuner.h"

#include "pt1_i2c.h"

#include "pt1_tuner_data.h"

#include "pt1_ioctl.h"

#if LINUX_VERSION_CODE > KERNEL_VERSION(3,8,0)

#define __devinit

#define __devinitdata

#define __devexit

#define __devexit_p

#endif

#if LINUX_VERSION_CODE > KERNEL_VERSION(4,2,0)

#include <linux/vmalloc.h>

#endif

#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)

static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle)

{

return dma_alloc_coherent(&hwdev->dev, size, dma_handle, GFP_KERNEL);

}

static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle)

{

dma_free_coherent(&hwdev->dev, size, vaddr, dma_handle);

}

static inline int pci_set_dma_mask(struct pci_dev *hwdev, u64 mask)

{

return dma_set_mask(&hwdev->dev, mask);

}

#endif

/* These identify the driver base version and may not be removed. */

static char version[] __devinitdata =

DRV_NAME ".c: " DRV_VERSION " " DRV_RELDATE " \n";

MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp and Yoshiki Yazawa yaz@honeyplanet.jp");

#define DRIVER_DESC "PCI earthsoft PT1/2 driver"

MODULE_DESCRIPTION(DRIVER_DESC);

MODULE_LICENSE("GPL");

static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */

static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */

module_param(debug, int, 0);

module_param(lnb, int, 0);

MODULE_PARM_DESC(debug, "debug level (1-2)");

MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)");

#define VENDOR_EARTHSOFT 0x10ee

#define PCI_PT1_ID 0x211a

#define PCI_PT2_ID 0x222a

static struct pci_device_id pt1_pci_tbl[] = {

{ VENDOR_EARTHSOFT, PCI_PT1_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },

{ VENDOR_EARTHSOFT, PCI_PT2_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },

{ 0, }

};

MODULE_DEVICE_TABLE(pci, pt1_pci_tbl);

#define DEV_NAME "pt1video"

#define PACKET_SIZE 188 // 1パケット長

#define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数

#define MAX_PCI_DEVICE 128 // 最大64枚

#define DMA_SIZE 4096 // DMAバッファサイズ

#define DMA_RING_SIZE 128 // number of DMA RINGS

#define DMA_RING_MAX 511 // number of DMA entries in a RING(1023はNGで511まで)

#define CHANNEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps)

#define BS_CHANNEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps)

#define READ_SIZE (16*DMA_SIZE)

typedef struct _DMA_CONTROL{

dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報

__u32 *data[DMA_RING_MAX];

}DMA_CONTROL;

typedef struct _PT1_CHANNEL PT1_CHANNEL;

typedef struct _pt1_device{

unsigned long mmio_start ;

__u32 mmio_len ;

void __iomem *regs;

struct mutex lock ;

dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報

void *dmaptr[DMA_RING_SIZE] ;

struct task_struct *kthread;

dev_t dev ;

int card_number;

__u32 base_minor ;

struct cdev cdev[MAX_CHANNEL];

wait_queue_head_t dma_wait_q ;// for poll on reading

DMA_CONTROL *dmactl[DMA_RING_SIZE];

PT1_CHANNEL *channel[MAX_CHANNEL];

int cardtype;

} PT1_DEVICE;

typedef struct _MICRO_PACKET{

char data[3];

char head ;

}MICRO_PACKET;

struct _PT1_CHANNEL{

__u32 valid ; // 使用中フラグ

__u32 address ; // I2Cアドレス

__u32 channel ; // チャネル番号

int type ; // チャネルタイプ

__u32 packet_size ; // パケットサイズ

__u32 drop ; // パケットドロップ数

struct mutex lock ; // CH別mutex_lock用

__u32 size ; // DMAされたサイズ

__u32 maxsize ; // DMA用バッファサイズ

__u32 bufsize ; // チャネルに割り振られたサイズ

__u32 overflow ; // オーバーフローエラー発生

__u32 counetererr ; // 転送カウンタ１エラー

__u32 transerr ; // 転送エラー

__u32 minor ; // マイナー番号

__u8 *buf; // CH別受信メモリ

__u32 pointer;

__u8 req_dma ; // 溢れたチャネル

__u8 packet_buf[PACKET_SIZE] ; // 溢れたチャネル

PT1_DEVICE *ptr ; // カード別情報

wait_queue_head_t wait_q ; // for poll on reading

};

// I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T)

int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T};

int real_channel[MAX_CHANNEL] = {0, 2, 1, 3};

int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S,

CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T};

static PT1_DEVICE *device[MAX_PCI_DEVICE];

static struct class *pt1video_class;

#define PT1MAJOR 251

#define DRIVERNAME "pt1video"

static void reset_dma(PT1_DEVICE *dev_conf)

{

int lp ;

__u32 addr ;

int ring_pos = 0;

int data_pos = 0 ;

__u32 *dataptr ;

// データ初期化

for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){

for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){

dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];

dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;

}

// 転送カウンタをリセット

writel(0x00000010, dev_conf->regs);

// 転送カウンタをインクリメント

for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){

writel(0x00000020, dev_conf->regs);

}

addr = (int)dev_conf->ring_dma[0] ;

addr >>= 12 ;

// DMAバッファ設定

writel(addr, dev_conf->regs + DMA_ADDR);

// DMA開始

writel(0x0c000040, dev_conf->regs);

}

static int pt1_thread(void *data)

{

PT1_DEVICE *dev_conf = data ;

PT1_CHANNEL *channel ;

int ring_pos = 0;

int data_pos = 0 ;

int lp ;

int chno ;

int dma_channel ;

int packet_pos ;

__u32 *dataptr ;

__u32 *curdataptr ;

__u32 val ;

union mpacket{

__u32 val ;

MICRO_PACKET packet ;

}micro;

set_freezable();

reset_dma(dev_conf);

printk(KERN_INFO "pt1_thread run\n");

for(;;){

if(kthread_should_stop()){

break ;

}

for(;;){

dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];

// データあり？

if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){

break ;

}

micro.val = *dataptr ;

curdataptr = dataptr ;

data_pos += 1 ;

for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){

micro.val = *dataptr ;

dma_channel = ((micro.packet.head >> 5) & 0x07);

//チャネル情報不正

if(dma_channel > MAX_CHANNEL){

printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel);

continue ;

}

chno = real_channel[(((micro.packet.head >> 5) & 0x07) - 1)];

packet_pos = ((micro.packet.head >> 2) & 0x07);

channel = dev_conf->channel[chno] ;

// エラーチェック

if((micro.packet.head & MICROPACKET_ERROR)){

val = readl(dev_conf->regs);

if((val & BIT_RAM_OVERFLOW)){

channel->overflow += 1 ;

}

if((val & BIT_INITIATOR_ERROR)){

channel->counetererr += 1 ;

}

if((val & BIT_INITIATOR_WARNING)){

channel->transerr += 1 ;

}

// 初期化して先頭から

reset_dma(dev_conf);

ring_pos = data_pos = 0 ;

break ;

}

// 未使用チャネルは捨てる

if(channel->valid == FALSE){

continue ;

}

mutex_lock(&channel->lock);

// あふれたら読み出すまで待つ

while(1){

if(channel->size >= (channel->maxsize - PACKET_SIZE - 4)){

// 該当チャンネルのDMA読みだし待ちにする

wake_up(&channel->wait_q);

channel->req_dma = TRUE ;

mutex_unlock(&channel->lock);

// タスクに時間を渡す為中断

wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE),

msecs_to_jiffies(500));

mutex_lock(&channel->lock);

channel->drop += 1 ;

}else{

break ;

}

// 先頭で、一時バッファに残っている場合

if((micro.packet.head & 0x02) && (channel->packet_size != 0)){

channel->packet_size = 0 ;

}

// データコピー

channel->packet_buf[channel->packet_size] = micro.packet.data[2];

channel->packet_buf[channel->packet_size+1] = micro.packet.data[1];

channel->packet_buf[channel->packet_size+2] = micro.packet.data[0];

channel->packet_size += 3;

// パケットが出来たらコピーする

if(channel->packet_size >= PACKET_SIZE){

if (channel->pointer + channel->size >= channel->maxsize) {

// リングバッファの境界を越えていてリングバッファの先頭に戻っている場合

// channel->pointer + channel->size - channel->maxsize でリングバッファ先頭からのアドレスになる

memcpy(&channel->buf[channel->pointer + channel->size - channel->maxsize], channel->packet_buf, PACKET_SIZE);

} else if (channel->pointer + channel->size + PACKET_SIZE > channel->maxsize) {

// リングバッファの境界をまたぐように書き込まれる場合

// リングバッファの境界まで書き込み

__u32 tmp_size = channel->maxsize - (channel->pointer + channel->size);

memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, tmp_size);

// 先頭に戻って書き込み

memcpy(channel->buf, &channel->packet_buf[tmp_size], PACKET_SIZE - tmp_size);

} else {

// リングバッファ内で収まる場合

// 通常の書き込み

memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, PACKET_SIZE);

}

channel->size += PACKET_SIZE ;

channel->packet_size = 0 ;

}

mutex_unlock(&channel->lock);

}

curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;

if(data_pos >= DMA_RING_MAX){

data_pos = 0;

ring_pos += 1 ;

// DMAリングが変わった場合はインクリメント

writel(0x00000020, dev_conf->regs);

if(ring_pos >= DMA_RING_SIZE){

ring_pos = 0 ;

}

// 頻度を落す(wait until READ_SIZE)

for(lp = 0 ; lp < MAX_CHANNEL ; lp++){

channel = dev_conf->channel[real_channel[lp]] ;

if((channel->size >= READ_SIZE) && (channel->valid == TRUE)){

wake_up(&channel->wait_q);

}

schedule_timeout_interruptible(msecs_to_jiffies(100));

}

return 0 ;

}

static int pt1_open(struct inode* inode, struct file* file)

{

int major = imajor(inode);

int minor = iminor(inode);

int lp;

int lp2;

PT1_CHANNEL* channel;

for (lp = 0; lp < MAX_PCI_DEVICE; lp++) {

if (device[lp] == NULL) {

return -EIO;

}

if (MAJOR(device[lp]->dev) == major &&

device[lp]->base_minor <= minor &&

device[lp]->base_minor + MAX_CHANNEL > minor) {

mutex_lock(&device[lp]->lock);

for (lp2 = 0; lp2 < MAX_CHANNEL; lp2++) {

channel = device[lp]->channel[lp2];

if (channel->minor == minor) {

if (channel->valid == TRUE) {

mutex_unlock(&device[lp]->lock);

return -EIO;

}

/* wake tuner up */

set_sleepmode(channel->ptr->regs, &channel->lock,

channel->address, channel->type,

TYPE_WAKEUP);

schedule_timeout_interruptible(msecs_to_jiffies(100));

channel->drop = 0;

channel->valid = TRUE;

channel->overflow = 0;

channel->counetererr = 0;

channel->transerr = 0;

channel->packet_size = 0;

file->private_data = channel;

mutex_lock(&channel->lock);

// データ初期化

channel->size = 0;

mutex_unlock(&channel->lock);

mutex_unlock(&device[lp]->lock);

return 0;

}

return -EIO;

}

static int pt1_release(struct inode *inode, struct file *file)

{

PT1_CHANNEL *channel = file->private_data;

mutex_lock(&channel->ptr->lock);

SetStream(channel->ptr->regs, channel->channel, FALSE);

channel->valid = FALSE ;

printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop,

channel->overflow, channel->counetererr, channel->transerr);

channel->overflow = 0 ;

channel->counetererr = 0 ;

channel->transerr = 0 ;

channel->drop = 0 ;

// 停止している場合は起こす

if(channel->req_dma == TRUE){

channel->req_dma = FALSE ;

wake_up(&channel->ptr->dma_wait_q);

}

/* send tuner to sleep */

set_sleepmode(channel->ptr->regs, &channel->lock,

channel->address, channel->type, TYPE_SLEEP);

schedule_timeout_interruptible(msecs_to_jiffies(100));

mutex_unlock(&channel->ptr->lock);

return 0;

}

static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos)

{

PT1_CHANNEL *channel = file->private_data;

__u32 size ;

unsigned long dummy;

// READ_SIZE単位で起こされるのを待つ(CPU負荷対策)

if(channel->size < READ_SIZE){

wait_event_timeout(channel->wait_q, (channel->size >= READ_SIZE),

msecs_to_jiffies(500));

}

mutex_lock(&channel->lock);

if(!channel->size){

size = 0 ;

}else{

__u32 tmp_size = 0;

if (cnt < channel->size) {

// バッファにあるデータより小さい読み込みの場合

size = cnt;

} else {

// バッファにあるデータ以上の読み込みの場合

size = channel->size;

}

if (channel->maxsize <= size + channel->pointer) {

// リングバッファの境界を越える場合

tmp_size = channel->maxsize - channel->pointer;

// 境界までコピー

dummy = copy_to_user(buf, &channel->buf[channel->pointer], tmp_size);

// 残りをコピー

dummy = copy_to_user(&buf[tmp_size], channel->buf, size - tmp_size);

channel->pointer = size - tmp_size;

} else {

// 普通にコピー

dummy = copy_to_user(buf, &channel->buf[channel->pointer], size);

channel->pointer += size;

}

channel->size -= size;

}

// 読み終わったかつ使用しているのがが4K以下

if(channel->req_dma == TRUE){

channel->req_dma = FALSE ;

wake_up(&channel->ptr->dma_wait_q);

}

mutex_unlock(&channel->lock);

return size ;

}

static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq)

{

switch(channel->type){

case CHANNEL_TYPE_ISDB_S:

{

ISDB_S_TMCC tmcc ;

if(bs_tune(channel->ptr->regs,

&channel->ptr->lock,

channel->address,

freq->frequencyno,

&tmcc) < 0){

return -EIO ;

}

#if 0

printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF));

printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF));

{

int lp;

for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){

if(tmcc.ts_id[lp].ts_id == 0xFFFF){

continue ;

}

printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id);

printk(KERN_INFO "mode (low/high) = (%x:%x)\n",

tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode);

printk(KERN_INFO "slot (low/high) = (%x:%x)\n",

tmcc.ts_id[lp].low_slot,

tmcc.ts_id[lp].high_slot);

}

#endif

ts_lock(channel->ptr->regs,

&channel->ptr->lock,

channel->address,

tmcc.ts_id[freq->slot].ts_id);

}

break ;

case CHANNEL_TYPE_ISDB_T:

{

if(isdb_t_frequency(channel->ptr->regs,

&channel->ptr->lock,

channel->address,

freq->frequencyno, freq->slot) < 0){

return -EINVAL ;

}

return 0 ;

}

static int count_used_bs_tuners(void)

{

int count = 0;

int dev_idx;

int ch_idx;

PT1_DEVICE* dev;

for (dev_idx = 0; dev_idx < MAX_PCI_DEVICE; dev_idx++) {

dev = device[dev_idx];

if (!dev)

continue;

for (ch_idx = 0; ch_idx < MAX_CHANNEL; ch_idx++) {

if (dev->channel[ch_idx] &&

dev->channel[ch_idx]->type == CHANNEL_TYPE_ISDB_S &&

dev->channel[ch_idx]->valid)

count++;

}

printk(KERN_INFO "used bs tuners on all devices = %d\n", count);

return count;

}

static long pt1_do_ioctl(struct file *file, unsigned int cmd, unsigned long arg0)

{

PT1_CHANNEL *channel = file->private_data;

int signal = 0;

unsigned long dummy;

void *arg = (void *)arg0;

int lnb_eff, lnb_usr;

char *voltage[] = {"0V", "11V", "15V"};

int count;

switch(cmd){

case SET_CHANNEL:

{

FREQUENCY freq ;

dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY));

return SetFreq(channel, &freq);

}

case START_REC:

SetStream(channel->ptr->regs, channel->channel, TRUE);

return 0 ;

case STOP_REC:

SetStream(channel->ptr->regs, channel->channel, FALSE);

schedule_timeout_interruptible(msecs_to_jiffies(100));

return 0 ;

case GET_SIGNAL_STRENGTH:

switch(channel->type){

case CHANNEL_TYPE_ISDB_S:

signal = isdb_s_read_signal_strength(channel->ptr->regs,

&channel->ptr->lock,

channel->address);

break ;

case CHANNEL_TYPE_ISDB_T:

signal = isdb_t_read_signal_strength(channel->ptr->regs,

&channel->ptr->lock, channel->address);

break ;

}

dummy = copy_to_user(arg, &signal, sizeof(int));

return 0 ;

case LNB_ENABLE:

count = count_used_bs_tuners();

if (count <= 1) {

PT1_DEVICE* lnb_dev;

lnb_dev = device[0];

if (!lnb_dev)

return -EIO;

lnb_usr = (int)arg0;

lnb_eff = lnb_usr ? lnb_usr : lnb;

* Actual LNB power is supplied only from device[0].

settuner_reset(lnb_dev->regs,

lnb_dev->cardtype,

lnb_eff,

TUNER_POWER_ON_RESET_DISABLE);

schedule_timeout_interruptible(msecs_to_jiffies(1000));

printk(KERN_INFO

"PT1:LNB on %s master=%p request=%p\n",

voltage[lnb_eff], lnb_dev, channel->ptr);

}

return 0;

case LNB_DISABLE:

count = count_used_bs_tuners();

if (count <= 1) {

PT1_DEVICE* lnb_dev;

lnb_dev = device[0];

if (!lnb_dev)

return -EIO;

* Actual LNB power is disabled only on device[0].

settuner_reset(lnb_dev->regs,

lnb_dev->cardtype,

LNB_OFF,

TUNER_POWER_ON_RESET_DISABLE);

printk(KERN_INFO

"PT1:LNB off master=%p request=%p\n",

lnb_dev, channel->ptr);

}

return 0;

}

return -EINVAL;

}

static long pt1_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg0)

{

PT1_CHANNEL *channel = file->private_data;

long ret;

mutex_lock(&channel->lock);

ret = pt1_do_ioctl(file, cmd, arg0);

mutex_unlock(&channel->lock);

return ret;

}

static long pt1_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg0)

{

long ret;

/* should do 32bit <-> 64bit conversion here? --yaz */

ret = pt1_unlocked_ioctl(file, cmd, arg0);

return ret;

}

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)

static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg0)

{

int ret;

ret = (int)pt1_do_ioctl(file, cmd, arg0);

return ret;

}

#endif

static const struct file_operations pt1_fops = {

.owner = THIS_MODULE,

.open = pt1_open,

.release = pt1_release,

.read = pt1_read,

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)

.ioctl = pt1_ioctl,

#else

.unlocked_ioctl = pt1_unlocked_ioctl,

.compat_ioctl = pt1_compat_ioctl,

#endif

.llseek = no_llseek,

};

int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf)

{

int lp ;

int lp2 ;

DMA_CONTROL *dmactl;

__u32 *dmaptr ;

__u32 addr ;

__u32 *ptr ;

//DMAリング作成

for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){

ptr = dev_conf->dmaptr[lp];

if(lp == (DMA_RING_SIZE - 1)){

addr = (__u32)dev_conf->ring_dma[0];

}else{

addr = (__u32)dev_conf->ring_dma[(lp + 1)];

}

addr >>= 12 ;

memcpy(ptr, &addr, sizeof(__u32));

ptr += 1 ;

dmactl = dev_conf->dmactl[lp];

for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){

dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]);

if(dmaptr == NULL){

printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");

return -1 ;

}

dmactl->data[lp2] = dmaptr ;

// DMAデータエリア初期化

dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ;

addr = (__u32)dmactl->ring_dma[lp2];

addr >>= 12 ;

memcpy(ptr, &addr, sizeof(__u32));

ptr += 1 ;

}

return 0 ;

}

int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf)

{

int lp ;

void *ptr ;

for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){

ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]);

if(ptr == NULL){

printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");

return -1 ;

}

dev_conf->dmaptr[lp] = ptr ;

}

return pt1_makering(pdev, dev_conf);

}

int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf)

{

int lp ;

int lp2 ;

for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){

if(dev_conf->dmaptr[lp] != NULL){

pci_free_consistent(pdev, DMA_SIZE,

dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]);

for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){

if((dev_conf->dmactl[lp])->data[lp2] != NULL){

pci_free_consistent(pdev, DMA_SIZE,

(dev_conf->dmactl[lp])->data[lp2],

(dev_conf->dmactl[lp])->ring_dma[lp2]);

}

return 0 ;

}

static int __devinit pt1_pci_init_one (struct pci_dev *pdev,

const struct pci_device_id *ent)

{

int rc ;

int lp ;

int minor ;

u16 cmd ;

PT1_DEVICE *dev_conf ;

PT1_CHANNEL *channel ;

int i;

struct resource *dummy;

rc = pci_enable_device(pdev);

if (rc)

return rc;

rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));

if (rc) {

printk(KERN_ERR "PT1:DMA MASK ERROR");

return rc;

}

pci_read_config_word(pdev, PCI_COMMAND, &cmd);

if (!(cmd & PCI_COMMAND_MASTER)) {

printk(KERN_INFO "Attempting to enable Bus Mastering\n");

pci_set_master(pdev);

pci_read_config_word(pdev, PCI_COMMAND, &cmd);

if (!(cmd & PCI_COMMAND_MASTER)) {

printk(KERN_ERR "Bus Mastering is not enabled\n");

return -EIO;

}

printk(KERN_INFO "Bus Mastering Enabled.\n");

dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL);

if(!dev_conf){

printk(KERN_ERR "PT1:out of memory !");

return -ENOMEM ;

}

for (i = 0; i < DMA_RING_SIZE; i++) {

dev_conf->dmactl[i] = kzalloc(sizeof(DMA_CONTROL), GFP_KERNEL);

if(!dev_conf->dmactl[i]){

int j;

for (j = 0; j < i; j++) {

kfree(dev_conf->dmactl[j]);

}

kfree(dev_conf);

printk(KERN_ERR "PT1:out of memory !");

return -ENOMEM ;

}

switch(ent->device) {

case PCI_PT1_ID:

dev_conf->cardtype = PT1;

break;

case PCI_PT2_ID:

dev_conf->cardtype = PT2;

break;

default:

break;

}

// PCIアドレスをマップする

dev_conf->mmio_start = pci_resource_start(pdev, 0);

dev_conf->mmio_len = pci_resource_len(pdev, 0);

dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME);

if (!dummy) {

printk(KERN_ERR "PT1:cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start);

goto out_err_regbase;

}

dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len);

if (!dev_conf->regs){

printk(KERN_ERR "pt1:Can't remap register area.\n");

goto out_err_regbase;

}

// 初期化処理

if(xc3s_init(dev_conf->regs, dev_conf->cardtype)){

printk(KERN_ERR "Error xc3s_init\n");

goto out_err_fpga;

}

// チューナリセット

settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE);

schedule_timeout_interruptible(msecs_to_jiffies(100));

settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);

schedule_timeout_interruptible(msecs_to_jiffies(100));

mutex_init(&dev_conf->lock);

// Tuner 初期化処理

for(lp = 0 ; lp < MAX_TUNER ; lp++){

rc = tuner_init(dev_conf->regs, dev_conf->cardtype, &dev_conf->lock, lp);

if(rc < 0){

printk(KERN_ERR "Error tuner_init\n");

goto out_err_fpga;

}

// 初期化完了

for(lp = 0 ; lp < MAX_CHANNEL ; lp++){

set_sleepmode(dev_conf->regs, &dev_conf->lock,

i2c_address[lp], channeltype[lp], TYPE_SLEEP);

schedule_timeout_interruptible(msecs_to_jiffies(100));

}

rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME);

if(rc < 0){

goto out_err_fpga;

}

// 初期化

init_waitqueue_head(&dev_conf->dma_wait_q);

minor = MINOR(dev_conf->dev) ;

dev_conf->base_minor = minor ;

for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){

printk(KERN_INFO "PT1:device[%d]=%p\n", lp, device[lp]);

if(device[lp] == NULL){

device[lp] = dev_conf ;

dev_conf->card_number = lp;

break ;

}

for(lp = 0 ; lp < MAX_CHANNEL ; lp++){

cdev_init(&dev_conf->cdev[lp], &pt1_fops);

dev_conf->cdev[lp].owner = THIS_MODULE;

cdev_add(&dev_conf->cdev[lp],

MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1);

channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL);

if(!channel){

printk(KERN_ERR "PT1:out of memory !");

return -ENOMEM ;

}

// 共通情報

mutex_init(&channel->lock);

// 待ち状態を解除

channel->req_dma = FALSE ;

// マイナー番号設定

channel->minor = MINOR(dev_conf->dev) + lp ;

// 対象のI2Cデバイス

channel->address = i2c_address[lp] ;

channel->type = channeltype[lp] ;

// 実際のチューナ番号

channel->channel = real_channel[lp] ;

channel->ptr = dev_conf ;

channel->size = 0 ;

dev_conf->channel[lp] = channel ;

init_waitqueue_head(&channel->wait_q);

switch(channel->type){

case CHANNEL_TYPE_ISDB_T:

channel->maxsize = CHANNEL_DMA_SIZE ;

channel->buf = vmalloc(CHANNEL_DMA_SIZE);

channel->pointer = 0;

break ;

case CHANNEL_TYPE_ISDB_S:

channel->maxsize = BS_CHANNEL_DMA_SIZE ;

channel->buf = vmalloc(BS_CHANNEL_DMA_SIZE);

channel->pointer = 0;

break ;

}

if(channel->buf == NULL){

goto out_err_v4l;

}

#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)

printk(KERN_INFO "PT1:card_number = %d\n",

dev_conf->card_number);

device_create(pt1video_class,

NULL,

MKDEV(MAJOR(dev_conf->dev),

(MINOR(dev_conf->dev) + lp)),

NULL,

"pt1video%u",

MINOR(dev_conf->dev) + lp +

dev_conf->card_number * MAX_CHANNEL);

#else

device_create(pt1video_class,

NULL,

MKDEV(MAJOR(dev_conf->dev),

(MINOR(dev_conf->dev) + lp)),

"pt1video%u",

MINOR(dev_conf->dev) + lp +

dev_conf->card_number * MAX_CHANNEL);

#endif

#if 0

dev_conf->vdev[lp] = video_device_alloc();

memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template));

video_set_drvdata(dev_conf->vdev[lp], channel);

video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1);

#endif

}

if(pt1_dma_init(pdev, dev_conf) < 0){

goto out_err_dma;

}

dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1");

pci_set_drvdata(pdev, dev_conf);

return 0;

out_err_dma:

pt1_dma_free(pdev, dev_conf);

out_err_v4l:

for(lp = 0 ; lp < MAX_CHANNEL ; lp++){

if(dev_conf->channel[lp] != NULL){

if(dev_conf->channel[lp]->buf != NULL){

vfree(dev_conf->channel[lp]->buf);

}

kfree(dev_conf->channel[lp]);

}

out_err_fpga:

writel(0xb0b0000, dev_conf->regs);

writel(0, dev_conf->regs + CFG_REGS_ADDR);

iounmap(dev_conf->regs);

release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);

for (i = 0; i < DMA_RING_SIZE; i++) {

kfree(dev_conf->dmactl[i]);

}

kfree(dev_conf);

out_err_regbase:

return -EIO;

}

static void __devexit pt1_pci_remove_one(struct pci_dev *pdev)

{

int lp ;

__u32 val ;

PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev);

int i;

if(dev_conf){

if(dev_conf->kthread) {

kthread_stop(dev_conf->kthread);

dev_conf->kthread = NULL;

}

// DMA終了

writel(0x08080000, dev_conf->regs);

for(lp = 0 ; lp < 10 ; lp++){

val = readl(dev_conf->regs);

if(!(val & (1 << 6))){

break ;

}

schedule_timeout_interruptible(msecs_to_jiffies(100));

}

pt1_dma_free(pdev, dev_conf);

for(lp = 0 ; lp < MAX_CHANNEL ; lp++){

if(dev_conf->channel[lp] != NULL){

cdev_del(&dev_conf->cdev[lp]);

vfree(dev_conf->channel[lp]->buf);

kfree(dev_conf->channel[lp]);

}

device_destroy(pt1video_class,

MKDEV(MAJOR(dev_conf->dev),

(MINOR(dev_conf->dev) + lp)));

}

unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL);

writel(0xb0b0000, dev_conf->regs);

writel(0, dev_conf->regs + CFG_REGS_ADDR);

settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_OFF);

release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);

iounmap(dev_conf->regs);

for (i = 0; i < DMA_RING_SIZE; i++) {

kfree(dev_conf->dmactl[i]);

}

device[dev_conf->card_number] = NULL;

kfree(dev_conf);

}

pci_set_drvdata(pdev, NULL);

}

#ifdef CONFIG_PM

static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state)

{

return 0;

}

static int pt1_pci_resume (struct pci_dev *pdev)

{

return 0;

}

#endif /* CONFIG_PM */

static struct pci_driver pt1_driver = {

.name = DRV_NAME,

.probe = pt1_pci_init_one,

.remove = __devexit_p(pt1_pci_remove_one),

.id_table = pt1_pci_tbl,

#ifdef CONFIG_PM

.suspend = pt1_pci_suspend,

.resume = pt1_pci_resume,

#endif /* CONFIG_PM */

};

static int __init pt1_pci_init(void)

{

printk(KERN_INFO "%s", version);

#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,0)

pt1video_class = class_create(DRIVERNAME);

#else

pt1video_class = class_create(THIS_MODULE, DRIVERNAME);

#endif

if (IS_ERR(pt1video_class))

return PTR_ERR(pt1video_class);

return pci_register_driver(&pt1_driver);

}

static void __exit pt1_pci_cleanup(void)

{

pci_unregister_driver(&pt1_driver);

class_destroy(pt1video_class);

}

module_init(pt1_pci_init);

module_exit(pt1_pci_cleanup);